Consider the diff-amp that was shown in Figure P11.63. The circuit and transistor parameters are
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Microelectronics: Circuit Analysis and Design
- Q1. The output characteristic of a typical transistor is shown below, where the quiescent point is selected on it. This transistor is used in the bias circuit presented below. Find the suitable values of Rg and Rc to fix the Q-point of the circuit properly. +Vcc = 12 V 12- Is = 70 uA 10- Ig = 60 uA 8- Rc Is = 50 uA Rs 6- Ig= 40 uA 4. Is = 30 uĄ Is = 20 uA B = 100 2- VBE = 0.7 V 0- -2- 2 4 6 8 10 12 14 16 VCE (V) Ic (mA)arrow_forward4. For the transistor in the figure shown below, the parameters are ß = 100 and VÀ = ∞. a. Design the circuit such that lEQ = 1mA and the Q-pt is in the center of the dc load line. b. If the peak-to-peak sinusoidal output voltage is 4V, determine the peak-to-peak sinusoidal signals at the base of the transistor and the peak-to-peak value of Vs. If the load resistor R₁ = 1kQ is connected to the output through a coupling capacitor, determine the peak-to-peak value in the output voltage, assuming vs is equal to the value determined in part (b). Vcc=+10 V www Rs = 0.7 kΩ Cc www RB RE voarrow_forward........ (Figure-1) R. RB= 380kN,Rc= 1kN B = 100, VBB = Vcc=12V RB ww Vec CC ......... I, V CE СЕ V ВЕ BB Q-1-b) Describe briefly the input / output characteristics and application of Common Emitter BJT Configurationarrow_forward
- 1. For the circuit in Figure 1: a) Calculate the input and output power if the input signal results in a base current of 5 mA rms. b) Calculate the input power dissipated by the circuit if Rg is changed to 1.5 kN. c) What maximum output power can be delivered by the circuit if RB is changed to 1.5 kN? d) If the circuit is biased at its center voltage and center collector operating point, what is the input power for a maximum output power of 1.5 W? +Vcc (18 V) Rc = 16 2 RB 1.2 k2 V. B - 40 100 µF Figure 1arrow_forwardInstruction/s: Draw, Illustrate and label your schematic diagram before solving the problem.2.) Given a Collector -Feedback Biased transistor circuit with voltage at common collector is +10v ,base resistor is 100k ohms, Collector resistor is 10k ohms and Base current is 8.38 micro ampere, ,Voltage at Base-emitter junction is 0.7v. Determine Beta DC , Collector current and Voltage at collector-emitter junction. These might help as a guide to answer the problem...arrow_forwardClass B Amplifier q1)If the input is 7.5Vp-p...DATA COLLECTION: What is the IL(peak)? a)7mA 6)mA 5)mA 4)mA q2) DATA COLLECTION: What is the Idc? a)3.84 b)4.82 c)3.82mA d)1.82mA q3)DATA COLLECTION: What is the input power in DC? Power input = 48.45mW Power input = 45.48mW Power input = 44.58mW Power input = 45.84mW q4) DATA COLLECTION: What is the output power in AC? a)18mW b)81mW c)11.8mW d)18.9mW q5)DATA COLLECTION: What is the power dissapated by each transistor? a)35.1mW b)53.1mW c)15.3mW d)13.5mW q6)DATA COLLECTION: What is the efficiency of class B amplifier? a)45% b)40% c)63% d)33% q7)arrow_forward
- From the figure shown, when S1 is at 1 : up position; the following statement is not correct except: (a) Collector-emitter voltage of Q1 is approximately zero (b) the LED will illuminate (c) the base voltage of Q2 is equal to 9 V (d) (b) and (c)arrow_forwardAs a maintenance engineer in a semiconductor company, you are given a task to replace the current version of dc-biasing circuit for a faulty tester machine. This dc-biasing circuit used an n-channel JFET as shown in Figure 2. Re-design a new dc-biasing circuit using an n-channel D-MOSFET that can produce a similar output current, IDQ as the previous circuit. Your tasks are: (i) Calculate the operating point (IDQ and VGSQ) of the dc-biasing circuit in Figure 2. Then sketch the JFET network transfer curve (ID and VGS). (ii) Without changing the circuit configuration, calculate the values of source resistor, RS and RB to achieve this objective. Determine the commercial value of the new RS and RB. For cost reduction reason, the values of RD, RA and VDD should be maintained. The chosen D-MOSFET has a maximum drain current of 8 mA and gate-source cutoff voltage of – 15V. The new RS value should be 3 times larger than the old RS used in the JFET network to compensate for the high…arrow_forward. Design a fixed bias-transistor circuit using V = Vcc = 10 V for a Q-point of Iç = 5 mA and Va 4 V. Assume Boc = 100.The design involves finding R, and Rc. inakomeont thot one is hiasedarrow_forward
- It is connected to the input of a transistor (BJT) amplifier circuit with a gain of "-50" with a peak value of 100mV. a sine sign is applied a) Draw the circuit. b) Underline the input and output voltages by specifying their values.arrow_forwardV* = + |ov Ri Rip ERC Vs RE V: -sV The following parameters are given for this transistor: B = 200 and VA = o. Design the circuit with the following value ICQ = 1.5mA and VCEQ = 5V. Find the small signal voltage gain AV = Vo/Vs. Find the input resistance in the signal source Vs.arrow_forwardSketch the de load line, quiescent collector current, quiescent voltsge, input power, output power and maximum efficiency of the circuit shown an Figure. The input results in a base current of 5 mA peak to peak What maximum output power can be delivered by the circuit, if the input voltage is changed resulting in a base current of 10mA peak to peak and hence find the maximum etficiency. cc=15 V R =18 2 -25arrow_forward
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