Microelectronics: Circuit Analysis and Design
4th Edition
ISBN: 9780073380643
Author: Donald A. Neamen
Publisher: McGraw-Hill Companies, The
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Chapter 11, Problem 11.10TYU
To determine
The design parameters of a given circuit replacing the current source with a cascade current source circuit to meet the specifications.
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11.13 The i-v characteristic of an n-channel
enhancement MOSFET is shown in Figure P11.13(a);
a standard amplifier circuit based on the n-channel
MOSFET is shown in Figure P11.13(b). Determine the
quiescent current ino and drain-to-source voltage vs
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QUESTION 12: The differential amplifier shown in Figure P11.60 has
a pair of pnp bipolars as input devices and a pair of npn bipolars
connected as an active load. The circuit is biased by Io=0.24 mA, and
the transistor parameters are ß = 80 , VẬP=90 V, and VAN = 115 V.
(a) Determine Io such that the de currents in the diff-amp are balanced.
(b) Find the open-circuit differential-mode voltage gain. (c) Determine
the differential-mode voltage gain if a load resistance R1 = 260 k2 is
connected to the output.
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QUESTION 10: The circuit parameters for diff-amp shown in Figure 11.30 are V* = 6 V, V = -6 V, and Io = 0.45 mA. The transistor parameters are ß = 74, V₁1
= V42 = 115 V₂ V 43 V 44 = 90 V, and V45 = ∞0.
Determine the open-circuit differential-mode voltage gain. What is the output resistance of the diff-amp? Find the value of load resistance R₁ that reduces the
differential-mode gain to 71 percent of the open-circuit value.
Ad (open circuit)
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Chapter 11 Solutions
Microelectronics: Circuit Analysis and Design
Ch. 11 - The circuit parameters for the differential...Ch. 11 - Consider the de transfer characteristics shown in...Ch. 11 - Prob. 11.1CSPCh. 11 - Consider the diff-amp described in Example 11.3 ....Ch. 11 - Prob. 11.4EPCh. 11 - Prob. 11.1TYUCh. 11 - Prob. 11.2TYUCh. 11 - Assume the differential-mode gain of a diff-amp is...Ch. 11 - Prob. 11.5EPCh. 11 - Consider the diff-amp shown in Figure 11.15 ....
Ch. 11 - Prob. 11.7EPCh. 11 - Prob. 11.4TYUCh. 11 - Prob. 11.5TYUCh. 11 - The parameters of the diff-amp shown in Figure...Ch. 11 - For the differential amplifier in Figure 11.20,...Ch. 11 - The parameters of the circuit shown in Figure...Ch. 11 - The circuit parameters of the diff-amp shown in...Ch. 11 - Consider the differential amplifier in Figure...Ch. 11 - The diff-amp in Figure 11.19 is biased at IQ=100A....Ch. 11 - Prob. 11.10TYUCh. 11 - The diff-amp circuit in Figure 11.30 is biased at...Ch. 11 - Prob. 11.11EPCh. 11 - Prob. 11.12EPCh. 11 - Prob. 11.11TYUCh. 11 - Prob. 11.12TYUCh. 11 - Redesign the circuit in Figure 11.30 using a...Ch. 11 - Prob. 11.14TYUCh. 11 - Prob. 11.15TYUCh. 11 - Prob. 11.16TYUCh. 11 - Prob. 11.17TYUCh. 11 - Consider the Darlington pair Q6 and Q7 in Figure...Ch. 11 - Prob. 11.14EPCh. 11 - Consider the Darlington pair and emitter-follower...Ch. 11 - Prob. 11.19TYUCh. 11 - Prob. 11.15EPCh. 11 - Consider the simple bipolar op-amp circuit in...Ch. 11 - Prob. 11.17EPCh. 11 - Define differential-mode and common-mode input...Ch. 11 - Prob. 2RQCh. 11 - From the dc transfer characteristics,...Ch. 11 - What is meant by matched transistors and why are...Ch. 11 - Prob. 5RQCh. 11 - Explain how a common-mode output signal is...Ch. 11 - Define the common-mode rejection ratio, CMRR. What...Ch. 11 - What design criteria will yield a large value of...Ch. 11 - Prob. 9RQCh. 11 - Define differential-mode and common-mode input...Ch. 11 - Sketch the de transfer characteristics of a MOSFET...Ch. 11 - Sketch and describe the advantages of a MOSFET...Ch. 11 - Prob. 13RQCh. 11 - Prob. 14RQCh. 11 - Describe the loading effects of connecting a...Ch. 11 - Prob. 16RQCh. 11 - Prob. 17RQCh. 11 - Prob. 18RQCh. 11 - (a) A differential-amplifier has a...Ch. 11 - Prob. 11.2PCh. 11 - Consider the differential amplifier shown in...Ch. 11 - Prob. 11.4PCh. 11 - Prob. D11.5PCh. 11 - The diff-amp in Figure 11.3 of the text has...Ch. 11 - The diff-amp configuration shown in Figure P11.7...Ch. 11 - Consider the circuit in Figure P11.8, with...Ch. 11 - The transistor parameters for the circuit in...Ch. 11 - Prob. 11.10PCh. 11 - Prob. 11.11PCh. 11 - The circuit and transistor parameters for the...Ch. 11 - Prob. 11.13PCh. 11 - Consider the differential amplifier shown in...Ch. 11 - Consider the circuit in Figure P11.15. The...Ch. 11 - Prob. 11.16PCh. 11 - Prob. 11.17PCh. 11 - For the diff-amp in Figure 11.2, determine the...Ch. 11 - Prob. 11.19PCh. 11 - Prob. D11.20PCh. 11 - Prob. 11.21PCh. 11 - The circuit parameters of the diff-amp shown in...Ch. 11 - Consider the circuit in Figure P11.23. Assume the...Ch. 11 - Prob. 11.24PCh. 11 - Consider the small-signal equivalent circuit of...Ch. 11 - Prob. D11.26PCh. 11 - Prob. 11.27PCh. 11 - A diff-amp is biased with a constant-current...Ch. 11 - The transistor parameters for the circuit shown in...Ch. 11 - Prob. D11.30PCh. 11 - For the differential amplifier in Figure P 11.31...Ch. 11 - Prob. 11.32PCh. 11 - Prob. 11.33PCh. 11 - Prob. 11.34PCh. 11 - Prob. 11.35PCh. 11 - Prob. 11.36PCh. 11 - Consider the normalized de transfer...Ch. 11 - Prob. 11.38PCh. 11 - Consider the circuit shown in Figure P 11.39 . The...Ch. 11 - Prob. 11.40PCh. 11 - Prob. 11.41PCh. 11 - Prob. 11.42PCh. 11 - Prob. 11.43PCh. 11 - Prob. D11.44PCh. 11 - Prob. D11.45PCh. 11 - Prob. 11.46PCh. 11 - Consider the circuit shown in Figure P 11.47 ....Ch. 11 - Prob. 11.48PCh. 11 - Prob. 11.49PCh. 11 - Prob. 11.50PCh. 11 - Consider the MOSFET diff-amp with the...Ch. 11 - Consider the bridge circuit and diff-amp described...Ch. 11 - Prob. D11.53PCh. 11 - Prob. 11.54PCh. 11 - Prob. 11.55PCh. 11 - Consider the JFET diff-amp shown in Figure P11.56....Ch. 11 - Prob. 11.57PCh. 11 - Prob. 11.58PCh. 11 - Prob. D11.59PCh. 11 - The differential amplifier shown in Figure P 11.60...Ch. 11 - Prob. 11.61PCh. 11 - Consider the diff-amp shown in Figure P 11.62 ....Ch. 11 - Prob. 11.63PCh. 11 - The differential amplifier in Figure P11.64 has a...Ch. 11 - Prob. 11.65PCh. 11 - Consider the diff-amp with active load in Figure...Ch. 11 - The diff-amp in Figure P 11.67 has a...Ch. 11 - Consider the diff-amp in Figure P11.68. The PMOS...Ch. 11 - Prob. 11.69PCh. 11 - Prob. 11.70PCh. 11 - Prob. D11.71PCh. 11 - Prob. D11.72PCh. 11 - An all-CMOS diff-amp, including the current source...Ch. 11 - Prob. D11.74PCh. 11 - Consider the fully cascoded diff-amp in Figure...Ch. 11 - Consider the diff-amp that was shown in Figure...Ch. 11 - Prob. 11.77PCh. 11 - Prob. 11.78PCh. 11 - Prob. 11.79PCh. 11 - Prob. 11.80PCh. 11 - Consider the BiCMOS diff-amp in Figure 11.44 ,...Ch. 11 - The BiCMOS circuit shown in Figure P11.82 is...Ch. 11 - Prob. 11.83PCh. 11 - Prob. 11.84PCh. 11 - For the circuit shown in Figure P11.85, determine...Ch. 11 - The output stage in the circuit shown in Figure P...Ch. 11 - Prob. 11.87PCh. 11 - Consider the circuit in Figure P11.88. The bias...Ch. 11 - Prob. 11.89PCh. 11 - Consider the multistage bipolar circuit in Figure...Ch. 11 - Prob. D11.91PCh. 11 - Prob. 11.92PCh. 11 - For the transistors in the circuit in Figure...Ch. 11 - Prob. 11.94PCh. 11 - Prob. 11.95PCh. 11 - Prob. 11.96PCh. 11 - Consider the diff-amp in Figure 11.55 . The...Ch. 11 - The transistor parameters for the circuit in...
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- Determine the W/L and other values in the single stage common-source amplifier below such that drain current is 11.33 amp and gain is high.arrow_forwardConsider the circuit shown in Figure 11.10 on page 567. The transistor characteristics are shown in Figure 11.11. Suppose that VGG is changed to 0 V. Determine the values of VDSQ, VDSmin and VDSmax. Find the gain of the amplifier.arrow_forwardGiven that the enhancement transistor shown in Figure P11.14 has Vto=1 V and K=0.5 mA/V2. find the value of the resistance R.arrow_forward
- 19 The circuit of Figure P11.19 is a Class A amplifier. a. Determine the output current for the given biased audio tone input, Vc = 10+0.1 cos(500t) V. Let K = 2mA/V? and Vr = 3 V. b. Determine the output voltage. c. Determine the voltage gain of the cos(5007) signal. d. Determine the DC power consumption of the resistor and the MOSFET. 15 V 602 outarrow_forwardQUESTION 5: Consider the differential amplifier in Figure P11.17 with parameters V = 5 V, V = -5 V, and Io = 0.8 mA. Neglect base currents and assume V₁ = ∞ for all transistors. The emitter currents can be written as I£1 = IS1 EXP(VBE1/VT) and I£2 = 152 EXP(VBE2/VT). If v₁ = v₂ = 0, Is1 = 2.3 x 10-¹5 A and Is2 = 2.2 x 10-¹5 A, determine (v01 - v0₂) for Rc₁ = 7.2 k and Rc2 = 7.9 kq. IE1 (mA) Format : 0.3093 IE2 (mA) Format : 0.5634 (V01 - V02) (V) Format: 0.5862 V+ R₁ 2₁ Rc1 VOI Rc2 O V02 2₂ V Figure P11.17 V₂ 24arrow_forwardQuestion What must be the minimum power rating for the external pass transistor used with a 7815 regulator in a circuit such as that shown in Figure below? The input voltage is 30 V and the load resistance is 10 N. The maximum internal current is to be 700 mA. Assume that there is no heat sink for this calculation. Keep in mind that the use of a heat sink increases the effective power rating of the transistor and you can use a lower rated transistor. Qext VIN Rext VOUT C 7815 - RLarrow_forward
- QUESTION 3: The diff-amp configuration shown in Figure 11.7 is biased at 3.3 V and -3.3 V. The maximum power dissipation in the entire circuit is to be no more than 1.2 mW when v₁ = v₂ = 0. The available transistors have parameters: ß = 130, VBE(on) = 0.71 V, and VA = 00. Design the circuit to produce the maximum possible differential-mode voltage gain, but such that the common-mode input voltage can be within the range - 0.91 < VCM<0.91 V and the transistors are still biased in the forward-active region. What is the value of Ad? R₁ (kQ) Format: 67.42 Rc (kn) Format 48.55 8m (mA/V) Format: 8.3846 Ad Format: 66.55 V+ R₁ IC₁Rc Ic₂Rc ww 23 1010 24 Figure 11.7 2₂ -0 U₂ ICAarrow_forwardUse a load-line analysis for the PMOS amplifier shown in Figure P11.24 to determine the maximum, minimum, and Q-point values of vo(t). The characteristics of the transistor are shown in Figure 11.9 on page 565.arrow_forwardA. For the configuration shown below in 4(A), find the small signal voltage gain (Voutp-Voutm)/Vin B. For the configuration shown in 4(B), find the following parameters (a) DC value of output voltage, (b) input common mode range and (c) small signal voltage gain when all transistors are in saturation vou/Vin as indicated in the diagram; Assume no body bias on M1 ad M2 For this problem ONLY, assume the following device parameters V7, = \V| = 0.5V;K, = k ,' = 100 µA / V²,a, = a, = 0.01 VDD = 3V (10/1) M, M. (10/1) (10/1) M, |M, (10/1) Voutp 20kΩ м, (200/1) м, м, (10/1) м, Vin (1/1) м, M. (10/1) + Vin DC VAN M, 100HA (1/1) M, M, (10/1) (A) (B) V. =-1Varrow_forward
- common gate bias a)Calculate the resistances, currents and voltages,with Transistor J111 Narrow_forward9 The NMOS transistor shown in Figure P11.9 has Vr = 1.5 V and K = 0.4 mA/V². If vg is a pulse with O to 5 V, find the voltage levels of the pulse signal at the drain output. 1 k2: VD VDD = 5 VE VG G VGarrow_forwardb) Refer to BJT cascade amplifier in Figure Q2, determine the de bias voltages and collector current for each stage.arrow_forward
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Differential Amplifiers Made Easy; Author: The AudioPhool;https://www.youtube.com/watch?v=Mcxpn2HMgtU;License: Standard Youtube License