The MOSFET current-source circuit in Figure P10.44 is biased at V + = 2.0 V . The transistor parameters are V T N = 0.5 V , k ′ n = 80 μ A / V 2 ,and λ = 0.015 V − 1 . (a) Design the circuit such that I R E F = 50 μ A and thenominal bias current is I O = 100 μ A . (b) Find the output resistance R O .(c) Determine the percentage change in I o , for a change in drain-to-sourcevoltage of Δ V D S 2 = 1 V .
The MOSFET current-source circuit in Figure P10.44 is biased at V + = 2.0 V . The transistor parameters are V T N = 0.5 V , k ′ n = 80 μ A / V 2 ,and λ = 0.015 V − 1 . (a) Design the circuit such that I R E F = 50 μ A and thenominal bias current is I O = 100 μ A . (b) Find the output resistance R O .(c) Determine the percentage change in I o , for a change in drain-to-sourcevoltage of Δ V D S 2 = 1 V .
Solution Summary: The author explains the design parameters of the circuit for the given specifications.
The MOSFET current-source circuit in Figure P10.44 is biased at
V
+
=
2.0
V
. The transistor parameters are
V
T
N
=
0.5
V
,
k
′
n
=
80
μ
A
/
V
2
,and
λ
=
0.015
V
−
1
. (a) Design the circuit such that
I
R
E
F
=
50
μ
A
and thenominal bias current is
I
O
=
100
μ
A
. (b) Find the output resistance
R
O
.(c) Determine the percentage change in
I
o
, for a change in drain-to-sourcevoltage of
Δ
V
D
S
2
=
1
V
.
For the circuit given below Given Vsat=12V . I) Identify the stages
II) Find the output voltage
5V
B
OV
OV
For all the MOSFETS assume Vth=1V
and k =50 mA/V²
R₁ = 4700
Ao
M₁
M₂
B
Indicate and verify the state of each MOSFET and Vo for the following input combinations. Fill
out the table for each assumed state of the MOSFET for every input combination. Use Rds(on)
approximation for linear operation and three significant figures for the voltages.
M1 is assumed to be in saturation.
If Vgs = 2 V, Vds = 4V,
Vds > Vgs - Vth
4>2-1
4> 1 (ok)
Vgs > Vth (2>1)
A
M2 state
M3 state
V.
0
OV
5 V
R₂ = 560Ω
5V
M1 state
M3
4. For the transistor in the figure shown below, the parameters are ß = 100 and VÀ = ∞.
a. Design the circuit such that lEQ = 1mA and the Q-pt is in the center of the dc load line.
b. If the peak-to-peak sinusoidal output voltage is 4V, determine the peak-to-peak sinusoidal
signals at the base of the transistor and the peak-to-peak value of Vs.
If the load resistor R₁ = 1kQ is connected to the output through a coupling capacitor,
determine the peak-to-peak value in the output voltage, assuming vs is equal to the value
determined in part (b).
Vcc=+10 V
www
Rs = 0.7 kΩ
Cc
www
RB
RE
vo
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