Given Information : The given code is: // define structure square point_color { // variable declaration int c; int m; int y; int k; }; // declare structure array struct point_color square[16][16]; int i,j; // traverse through the array for(i=0;i<16;i++) { //traverse through elements for(j=0;j<16;j++) { //square all elements of the 2-D array square[i][j].c=0; square[i][j].m=0; square[i][j].y=1; square[i][j].k=0; } } Write hit: If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty. If the state of information is in valid state then it executes a write-through operation. It then updates the memory and block and changes its blocked state to reserved state. Write miss : A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

Question

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Answer 1

Question

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

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In a computer with a 32-bit data-bus, how many 4-bit wide memory components are used? the answer to this part is 32/4 = 8 components (2-bit wide) I need the answer to part two, please If the size of each 4-bit memory component is 4 x n cells where n = 1G (i.e., 4 x n uniquely addressable locations—n : row, 4 : 2 column/width), what is the total capacity of the memory system? Show your answer in power of 2. (hint: 1000 ~ 210)

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Answer 2

Question

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Expert Solution & Answer

Want to see the full answer?

Check out a sample textbook solution

See solution

Answer 3

Question

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Expert Solution & Answer

Want to see the full answer?

Check out a sample textbook solution

See solution

Answer 4

Question

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Expert Solution & Answer

Want to see the full answer?

Check out a sample textbook solution

See solution

Answer 5

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Answer 6

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

Answer 7

Chapter 6, Problem 6.38HW

A)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

Answer 8

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

Answer 9

B)

Program Plan Intro

Given Information:

The given code is:

// define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Write hit:

If the information in the cache is reserved or in dirty state then the cache line is updated in its place without updating memory set from its state to dirty.

If the state of information is in valid state then it executes a write-through operation.

It then updates the memory and block and changes its blocked state to reserved state.

Write miss:

A partial cache line write is handed as a read miss followed by a write hit. All the other caches are left in the invalid state and the reserved state is occupied by the current state.

Answer 10

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Answer 11

C)

Program Plan Intro

Given Information:

The given code is:

//define structure

square point_color

{

// variable declaration

int c;

int m;

int y;

int k;

};

// declare structure array

struct point_color square[16][16];

int i,j;

// traverse through the array

for(i=0;i<16;i++)

{

//traverse through elements

for(j=0;j<16;j++)

{

//square all elements of the 2-D array

square[i][j].c=0;

square[i][j].m=0;

square[i][j].y=1;

square[i][j].k=0;

}

}

Answer 12

Expert Solution & Answer

Answer 13

Expert Solution & Answer

Answer 14

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Check out a sample textbook solution

See solution

Answer 15

Ch. 6.1 - Prob. 6.1PP Ch. 6.1 - Prob. 6.2PP Ch. 6.1 - Prob. 6.3PP Ch. 6.1 - Prob. 6.4PP Ch. 6.1 - Prob. 6.5PP Ch. 6.1 - Prob. 6.6PP Ch. 6.2 - Prob. 6.7PP Ch. 6.2 - Prob. 6.8PP Ch. 6.4 - Prob. 6.9PP Ch. 6.4 - Prob. 6.10PP

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Chapter 6 Solutions