Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
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Textbook Question
Chapter 6, Problem 6.32HW
Repeat Problem 6.31 for memory address0x16E8
A. Address format (1 bit per box):
B. Memory Reference:
| Parameter | Value |
| Cache offset (CO) | 0x____ |
| Cache index (CI) | 0x____ |
| Cache tag (CT) | 0x____ |
| Cache hit? (Y/N) | ____ |
| Cache byte returned | 0x____ |
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Q: A digital computer has a memory unit of 64k * 16 and a cache memory of 1k words. The cache uses direct mapping with a block size of 4 words.
i) How many bits are there in the tag, index, block & words fields of the address formats.ii) How many bits are there in each word of cache?
iii) How many blocks can the cache accommodate?
Note: this question is related from computer architecture subject kindly solved this correctly and completly.
For a direct-mapped cache design with 64-bit addresses, the following bits of the address are used to access the cache:
Tag
Index
Offset
63-13
12-4
3-0
a. What is the cache block size (in bytes)?b. What is the cache size (in bytes)?c. What is the total number of bits (including valid bit, tag bits and data array bits) to implement this cache?d. For the same block and cache sizes, you want to implement a 4-way set-associative cache, what is the number of index bit and the number of tag bits?
5. suppose a computer using fully associative cache has 224 bytes of byte-addressable main memory and a cache of 128 blocks, where each cache block contains 64 bytes.
a) how many blocks of main memory are there?
b) what is the format of a memory address as seen by the cache ; that is, what are the size of the tag and offset field.
c) To which cache block will the memory address 0x01D872 map?
Chapter 6 Solutions
Computer Systems: A Programmer's Perspective (3rd Edition)
Ch. 6.1 - Prob. 6.1PPCh. 6.1 - Prob. 6.2PPCh. 6.1 - Prob. 6.3PPCh. 6.1 - Prob. 6.4PPCh. 6.1 - Prob. 6.5PPCh. 6.1 - Prob. 6.6PPCh. 6.2 - Prob. 6.7PPCh. 6.2 - Prob. 6.8PPCh. 6.4 - Prob. 6.9PPCh. 6.4 - Prob. 6.10PP
Ch. 6.4 - Prob. 6.11PPCh. 6.4 - Prob. 6.12PPCh. 6.4 - Prob. 6.13PPCh. 6.4 - Prob. 6.14PPCh. 6.4 - Prob. 6.15PPCh. 6.4 - Prob. 6.16PPCh. 6.5 - Prob. 6.17PPCh. 6.5 - Prob. 6.18PPCh. 6.5 - Prob. 6.19PPCh. 6.5 - Prob. 6.20PPCh. 6.6 - Prob. 6.21PPCh. 6 - Prob. 6.22HWCh. 6 - Prob. 6.23HWCh. 6 - Suppose that a 2 MB file consisting of 512-byte...Ch. 6 - The following table gives the parameters for a...Ch. 6 - The following table gives the parameters for a...Ch. 6 - Prob. 6.27HWCh. 6 - This problem concerns the cache in Practice...Ch. 6 - Suppose we have a system with the following...Ch. 6 - Suppose we have a system with following...Ch. 6 - Suppose that a program using the cache in Problem...Ch. 6 - Repeat Problem 6.31 for memory address0x16E8 A....Ch. 6 - Prob. 6.33HWCh. 6 - Prob. 6.34HWCh. 6 - Prob. 6.35HWCh. 6 - Prob. 6.36HWCh. 6 - Prob. 6.37HWCh. 6 - Prob. 6.38HWCh. 6 - Prob. 6.39HWCh. 6 - Given the assumptions in Problem 6.38, determine...Ch. 6 - You are writing a new 3D game that you hope will...Ch. 6 - Prob. 6.42HWCh. 6 - Prob. 6.43HWCh. 6 - Prob. 6.45HWCh. 6 - Prob. 6.46HW
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- Suppose a computer using fully associative cache has 4 GB of byte-addressable main memory and a cache of 256 blocks, where each block contains 256 bytes. a) How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag and offset fields? c) To which cache block will the memory address 0X1A1B1C1D map?arrow_forward1)Encode the binary data 1010101010 into an even parity Hamming code. 2)A direct mapped cache consists of 256 slots. Main memory contains 64K blocks of 16 words each. Access time of the cache is 15 ns, and that for the main memory is 120 ns. Assume that main memory is accessed in parallel with cache look up. Initially, the cache is empty. (a) Give the format of the memory address. (b) Compute the effective access time, if suppose the hit ratio for read is 90%.arrow_forward2. 2. Suppose a computer using direct-mapped cache has 232 bytes of byte-addressable main memory and a cache of 1024 blocks, where each cache block contains 32 bytes. 1. a) How many blocks of main memory are there? 2. b) What is the format of a memory address as seen by the cache; that is, what are the sizes of the tag, block, and offset fields? 3. c) To which cache block will the memory address oxoo00063FA map?arrow_forward
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