2. 2. Suppose a computer using direct-mapped cache has 2³2 bytes of byte-addressable main memory and a cache of 1024 blocks, where each cache block contains 32 bytes. 1. a) How many blocks of main memory are there? 2. b) What is the format of a memory address as seen by the cache; that is, what are the sizes of the tag, block, and offset fields? 3. c) To which cache block will the memory address ox000063FA map?

operating system

5. How many bits are required to address a 4M X 16 main memory if a) main memory is byte addressable? b) main memory is word addressable? 6. How many bits are required to address a 1M X 8 main memory if a) main memory is byte addressable? b) main memory is word addressable?

8.9. The IBM System/370 architecture uses a two-level memory structure and refers to the two levels as segments and pages, although the segmentation approach lacks many of the features described earlier in this chapter. For the basic 370 architecture, the page size may be either 2 Kbytes or 4 Kbytes, and the segment size is fixed at either 64 Kbytes or 1 Mbyte. For the 370/XA and 370/ESA architectures, the page size is 4 Kbytes and the segment size is 1 Mbyte. Which advantages of segmentation does this scheme lack? What is the benefit of segmentation for the 370?