Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
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Expert Solution & Answer
Chapter 4.1, Problem 4.3PP
Explanation of Solution
Given assembly code:
long sum(long *start, long count)
start in %rdi, count in %rsi
sum:
irmovq $8, %r8
irmovq $1, %r9
xorq %rax, %rax
andq %rsi, %rsi
jmp test
loop:
mrmovq (%rdi), %r10
addq %r10, %rax
addq %r8, %rdi
subq %r9, %rsi
test:
jne loop
ret
Data movement instructions:
- The different instructions are been grouped as “instruction classes”.
- The instructions in a class performs same operation but with different sizes of operand.
- The “Mov” class denotes data movement instructions that copy data from a source location to a destination.
- The class has 4 instructions that includes:
- movb:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 1 byte data size.
- movw:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 2 bytes data size.
- movl:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 4 bytes data size.
- movq:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 8 bytes data size.
- movb:
Unary and Binary Operations:
- The details of unary operations includes:
- The single operand functions as both source as well as destination.
- It can either be a memory location or a register.
- The instruction “incq” causes 8 byte element on stack top to be incremented.
- The instruction “decq” causes 8 byte element on stack top to be decremented.
- The details of binary operations includes:
- The first operand denotes the source.
- The second operand works as both source as well as destination.
- The first operand can either be an immediate value, memory location or register.
- The second operand can either be a register or a memory location...
Expert Solution & Answer
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(c) Below is an assembly language instruction for a subtraction operation.
R20, 0x78
LDI
LDI
R21. 0x0A
SUB
R20, R21
(1) Fill in Table Q.1(a) with the value in register R20 after execution of the
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R20
Table Q.1(a): R20 Register
D D D₁ D₁ D₂ D₂ D₁ D₂
(ii) Determine the value of the H, N and Z flags after execution of the
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Question: C part
A Instruction Set Architecture
A.1 Instruction set
We present a list of instructions typical of a RISC (reduced instruction set computer) machine. In data-movement and control instructions, the addresses may be immediate #X, direct (memory) M, indirect (memory) [M], register r, or register indirect [r] addresses. Data-processing instructions use immediate or register addressing. PC is the programme counter and a <- b indicates that the value of b is placed in a.
LOAD a, b a <- b
STOR a, b a <- b
ADD a, b, c a <- b + c
ASH a, b, c a <- (b >>[s] c)
LSH a, b, c a <- (b >>[u] c) BR a PC <- a
SUB
a,
b,
c
a
<-
b
- c
BEQ
a,
b,
c
PC
<-
a
if
b =
c
MUL
a,
b,
c
a
<-
b
* c
BNE
a,
b,
c
PC
<-
a
if
not
b = c
DIV
a,
b,
c
a
<-
b…
(a) An instruction at address 021 in the basic computer has I-0, an operation code of the AND
instruction, and an address part equal to 083 (all numbers are in hexadecimal). The memory word at
address 083 contains the operand B8F2 and the content of AC is A937. Go over the instruction cycle
and determine the contents of the following registers at the end of the execute phase: PC, AR, DR, AC,
and IR. Repeat the problem six more times starting with an operation code of another memory-
reference instruction.
Chapter 4 Solutions
Computer Systems: A Programmer's Perspective (3rd Edition)
Ch. 4.1 - Prob. 4.1PPCh. 4.1 - Prob. 4.2PPCh. 4.1 - Prob. 4.3PPCh. 4.1 - Prob. 4.4PPCh. 4.1 - Prob. 4.5PPCh. 4.1 - Prob. 4.6PPCh. 4.1 - Prob. 4.7PPCh. 4.1 - Prob. 4.8PPCh. 4.2 - Practice Problem 4.9 (solution page 484) Write an...Ch. 4.2 - Prob. 4.10PP
Ch. 4.2 - Prob. 4.11PPCh. 4.2 - Prob. 4.12PPCh. 4.3 - Prob. 4.13PPCh. 4.3 - Prob. 4.14PPCh. 4.3 - Prob. 4.15PPCh. 4.3 - Prob. 4.16PPCh. 4.3 - Prob. 4.17PPCh. 4.3 - Prob. 4.18PPCh. 4.3 - Prob. 4.19PPCh. 4.3 - Prob. 4.20PPCh. 4.3 - Prob. 4.21PPCh. 4.3 - Prob. 4.22PPCh. 4.3 - Prob. 4.23PPCh. 4.3 - Prob. 4.24PPCh. 4.3 - Prob. 4.25PPCh. 4.3 - Prob. 4.26PPCh. 4.3 - Prob. 4.27PPCh. 4.4 - Prob. 4.28PPCh. 4.4 - Prob. 4.29PPCh. 4.5 - Prob. 4.30PPCh. 4.5 - Prob. 4.31PPCh. 4.5 - Prob. 4.32PPCh. 4.5 - Prob. 4.33PPCh. 4.5 - Prob. 4.34PPCh. 4.5 - Prob. 4.35PPCh. 4.5 - Prob. 4.36PPCh. 4.5 - Prob. 4.37PPCh. 4.5 - Prob. 4.38PPCh. 4.5 - Prob. 4.39PPCh. 4.5 - Prob. 4.40PPCh. 4.5 - Prob. 4.41PPCh. 4.5 - Prob. 4.42PPCh. 4.5 - Prob. 4.43PPCh. 4.5 - Prob. 4.44PPCh. 4 - Prob. 4.45HWCh. 4 - Prob. 4.46HWCh. 4 - Prob. 4.47HWCh. 4 - Prob. 4.48HWCh. 4 - Modify the code you wrote for Problem 4.47 to...Ch. 4 - In Section 3.6.8, we saw that a common way to...Ch. 4 - Prob. 4.51HWCh. 4 - The file seq-full.hcl contains the HCL description...Ch. 4 - Prob. 4.53HWCh. 4 - The file pie=full. hcl contains a copy of the PIPE...Ch. 4 - Prob. 4.55HWCh. 4 - Prob. 4.56HWCh. 4 - Prob. 4.57HWCh. 4 - Our pipelined design is a bit unrealistic in that...Ch. 4 - Prob. 4.59HW
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- Question 4: a) Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i, and jare in registers $80, $s 1, $t0, and $t1, respectively. Also, assume that register $s2 holds the base address of array D. for (i=0; iarrow_forwardProblem I ( Assembler ) Provide the assembly implementation of the C - code below . Sub 10 is a function that subtract 10 from a given input x. Assumption : MyArray base address is store in register $S1. Feel free to use instruction li or si. li load an immediate value into a register . For instance, li $S4 5 will copy value 5 into register $S4. C code for ( i = 0,1 < 10 , i ++ ) { MyArray [ i ] = MyArray [ i - 1 ] + MyArray [ i + 1 ] ; Sub10 ( MyArray [ i ]; } Sub10 ( x ) { Return ( x - 10 ) ; }arrow_forwardProblem I ( Assembler ) Provide the assembly implementation of the C - code below . Sub 10 is a function that subtract 10 from a given input x. Assumption : MyArray base address is store in register $S1. Feel free to use instruction li or si. li load an immediate value into a register . For instance, li $S4 5 will copy value 5 into register $S4. C code for ( i = 0,1 < 10 , i ++ ) { MyArray [ i ] = MyArray [ i - 1 ] + MyArray [ i + 1 ] ; Sub10 ( MyArray [ i ]; } Sub10 ( x ) { Return ( x - 10 ) ; } Code in Assembly Language: sub10(int): ; Implementation of the sub10() function push rbp mov rbp, rsp mov DWORD PTR [rbp-4], edi mov eax, DWORD PTR [rbp-4] sub eax, 10 pop rbp ret main: ; Main function Implementation push rbp mov rbp, rsp sub rsp, 64 mov…arrow_forwardDO B part if do able A Instruction Set Architecture A.1 Instruction set We present a list of instructions typical of a RISC (reduced instruction set computer) machine. In data-movement and control instructions, the addresses may be immediate #X, direct (memory) M, indirect (memory) [M], register r, or register indirect [r] addresses. Data-processing instructions use immediate or register addressing. PC is the programme counter and a <- b indicates that the value of b is placed in a. LOAD a, b a <- b STOR a, b a <- b ADD a, b, c a <- b + c ASH a, b, c a <- (b >>[s] c) LSH a, b, c a <- (b >>[u] c) BR a PC <- a SUB a, b, c a <- b - c BEQ a, b, c PC <- a if b = c MUL a, b, c a <- b * c BNE a, b, c PC <- a if not b = c DIV a, b, c a <- b…arrow_forwardA. Question 02: Identify the types of addressing modes used in following instructions: Addressing Source Addressing Mode No Instruction B. C. D. Please answer all questions according to emu8086 Assembly Language E. MOV-2[BX], AX MOV CX, [BX+2] ADD AX, Array 1 [BX] MOV TEMP, 10h MOV BX, 2 + [SI] 18 Destination Modearrow_forward(a) Draw pipeline diagram (FI, DI, FO, EI) with one memory port for the following instructions: MOV [1234], 035 ADD_[1234], AX SUB BX, CX XOR CX, BX AND BX, 035 PUSH CX (b) Write the code for the following. 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