a. Explanation Given: The given circuit is shown below. V O S = 10 mV, I B 1 = I B 2 = 2 μ A and v I = 0 Calculation: For worst case output voltage due to offset voltage, the modified circuit is, For first op-amp V Y 1 = V O S Also V X 1 = V Y 1 for op-amp. So, V X 1 = V O S Now, KCL at input node V X 1 10 k + V X 1 − v O 1 100 k + I B 1 = 0 10 V X 1 + V X 1 − v O 1 100 k = 0 10 V X 1 + V X 1 − v O 1 = 0 v O 1 = 11 V X 1 v O 1 = 11 v O S v O 1 = 11 × 10 × 10 − 3 ⇒ | v O 1 | = 11 mV For second op-amp, V Y 2 = V O S Also V X 2 = V Y 2 for op-amp. So, V X 2 = V O S Now, KCL at input node of second op-amp V X 2 − v O 1 10 k + V X 2 − v O 2 50 k = 0 5 ( V X 2 − v O 1 ) + V X 2 − v O 2 50 k = 0 5 ( V X 2 − v O 1 ) + V X 2 − v O 2 = 0 v O 2 = 6 V X 2 − 5 v O 1 v O 2 = 6 V O S − 5 v O 1 v O 2 = 6 × 10 × 10 − 3 − 5 × 110 × 10 − 3 v O 2 = ( 60 − 550 ) × 10 − 3 ⇒ | v O 2 | = − 490 mV For worst case output due to bias current, the modified circuit is, For first op-amp V Y 1 = 0 Also V X 1 = V Y 1 = 0 due to virtual ground b. To determine The design parameters of the compensation circuit.

Microelectronics: Circuit Analysis and Design

4th Edition

ISBN: 9780073380643

Author: Donald A. Neamen

Publisher: McGraw-Hill Companies, The

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Question

Chapter 14, Problem D14.53P

To determine

Worst case output voltages vO1 and vO2 .

To determine

The design parameters of the compensation circuit.

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Chapter 14, Problem D14.52P

Chapter 14, Problem 14.55P

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Microelectronics: Circuit Analysis and Design

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