The variable
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- Q2: For the circuit shown in below, use (matlab, c++, or python) and Nodal Analysis to: a) Find the voltage across the current source 11 terminals b) Find the current through the resistance R1 c) Find the real and reactive Powers delivered by the current source 11 Find the real and reactive Powers consumed by the capacitor C2 d) 11 10 A RMS 50 Hz +35 Deg Z1 AM R2 402 Z4 R4 80 m Z2 L2 15 mH 12 7A RMS 50 Hz +74 Deg Zc1 C1 150 F R3 30 www w R6 40 Z6 L3 25 mH E1 100 V RMS - 40 Deg Z5 50 Hz www R5 20 Zc2 C2 200 Farrow_forwardThe shift between the voltage of Phase A and B in a three phase system is O 120 degree O 0 degree O 240 degree O 60 degreearrow_forwardPlot the output waveform of the following circuit R 16 4 V -16arrow_forward
- 4- The data sheet of a quad two-input NAND gate specifies the following parameters: IoH (max.)=0.4 mA, VOH (min.) =2.7 V, VIH (min.) =2V, VIL (max.)=0.8 V, VOL (max.)=0.4 V, IOL (max.)=8 mA, IL (max.)=0.4 mA, IH (max.)=20µA, ICCH (max.)=1.6 mA, ICCL (max.)=4.4 mA, tpLH =tpHL=15 ns and a supply voltage range of 5 V. Determine (a) The average power dissipation of a single NAND gate, (b) The maximum average propagation delay of a single gate, (c) The HIGH-state noise margin and (d) the LOW-state noise marginarrow_forwardConsider the designs of a 5-input AND gate shown below. Develop an expression for the minimum delay of each path if the path electrical effort is H. Daarrow_forwardProblem: Derive the logic expressions for a circuit that compares two unsigned numbers: X = x2x1xo and Y = = y2y1yo and generates three outputs: XGY, XEY, and XLY. One of these outputs is set to 1 to indicate that X is greater than, equal to, or less than Y, respectively.arrow_forward
- 1. The n-input logic gate shown below belongs to a family of logic gates that operate with the following voltage thresholds: Vol = 1V, VIL = 1.3v, VoH = 4V, and VIH = 3.5V. Voo = 5V, R = 100k, VTH =1.5V, and k = 0.25 mA/V. Vdd A1 A2 АЗ An R M1 M2 M3 Mn а. Find Z if all inputs are equal to the maximum input voltage that is considered logic low. (i.e. A1 = A2 = A3 = . = An = Vn) b. Solve for Rps,on of M1 at the minimum input voltage that is considered logic high. (i.e. A1 = Vas = VIn). Assuming Ros,on is the same for all MOSFETS, solve for the maximum value of n that will satisfy VoL (i.e. Zs VoL) when all inputs are equal to VIH. C.arrow_forwardFor the full-wave rectifier circuit shown in Fig. below, assume ideal diodes Find: (i) d.c. output voltage (ii) peak inverse voltage PIV IDEAL 5:1 m 230 V 100 2 m IDEAL eleee earrow_forwardDiscussion: - Write the T.T of the following function, and draw the circuit: a) F = X + YZ b) Y = A(B + C) + AC 2- Draw the circuit of this function: a) A = XYZ + X(Y + XYZ) b) R = XY + Z(Y + M) 3- Use NAND and NOR gates only to implement the following expression: a) F = (AB) + (CD) b) F = (A+ B)C A- Find the truth table of this circuit and write the function: a) NOT A OR NOT В OR Y C b) NOT AND A OR NOT Y B OR C Scanned by TapScannerarrow_forward
- For the circuit given in figure 7 apply Node Voltage Analysis and voltage and current across R1 and R5.arrow_forward4. In a series circuit with 10V applied: A. The greater the total resistance, the less the total current B. The greater the total current, the greater the total resistance C. The IR voltage drops will each equal 10V D. The sum of the IR voltage drops will equal 10V 5. When an IR voltage drop exists in a series circuit : A. The polarity of the resistor is equal to positive B. The polarity of the resistor is equal to negative C. The polarity of the resistor is less than the total current on both sides D. The polarity of the resistor is positive on one end and negative on the other because of current flowing through itarrow_forwardQ4 Draw logic gates for the function F. F (A, B, C, D) = (B'D) (A'+ C°D) + (BC'+ D'A)arrow_forward
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