Programmable Logic Controllers
5th Edition
ISBN: 9780073373843
Author: Frank D. Petruzella
Publisher: McGraw-Hill Education
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Question
Chapter 7, Problem 10P
Program Plan Intro
Timer:
- Timer is mainly used to keep an output ON for a specific length of time.
- It provides a preset delay to the control actions.
- In a timer, the output will be energized when the preset value becomes equal to the accumulated value.
- Three different types of timers include a Delay-OFF, a Delay-ON, and a Delay-ON-Retentive timer.
Timer OFF Delay (TOF):
- TOF refers to an off-delay timer.
- TOF counts the time-based intervals as soon as the instruction becomes false.
- Here, the output changes its state from high to low when the timer provides some time delay (instruction goes from ON to OFF state).
Explanation of Solution
b.
Given:
Consider the given conditions,
- Input = True
- EN = 1
- TT = 1
- DN = 1
Explanation:
- The input is true, so the timer immediately assigns the DN signal bits value as true.
- Since the input is received with true condition, the EN signal bit will become true...
Explanation of Solution
c.
Given:
Consider the given conditions,
- Input = True
- EN = 1
- TT = 0
- DN = 1
Explanation:
- The input is true, so the timer immediately assigns the DN signal bits value as true...
Explanation of Solution
d.
Given:
Consider the given conditions,
- Input = False
- EN = 0
- TT = 1
- DN = 1
Explanation:
- The input is received from true to false condition, so the DN signal bit will be still in the active mode...
Explanation of Solution
e.
Given:
Consider the given conditions,
- Input = False
- EN = 0
- TT = 0
- DN = 0
Explanation:
- The input is received from true to false condition, so the EN bit is assigned with “0”...
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1. Design a logic circuit that has 3 inputs A, B, and Cand one output F. The output of the circuit is to be F = 1if the number of
ones in input variables (ABC) is even, otherwise F=0. Construct the truth table.
2. Fnd the minterm expansion for the combinational circuit represented by the following truth table:
АВСЕ
0000
0011
0100
0111
1001
1011
1100
1111
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A sequential circuit has three flip-flops A, B, C; one input, x; and one output y. The state diagram is shown in Fig. P6-22. The circuit is to be designed by treating the unused state as don't - care condition. The final circuit must be analyzed to ensure that it is self correcting.
(B) Use JK flip-flops in the design
=
0,
Design a sequential circuit with two D flip-flops A and B, and one input x_in. When x_in
the state of the circuit remains the same. When x in = 1, the circuit goes through the state
transitions from 00 to 01, to 11, to 10, back to 00, and repeats.
Chapter 7 Solutions
Programmable Logic Controllers
Ch. 7 - Prob. 1RQCh. 7 - Prob. 2RQCh. 7 - Prob. 3RQCh. 7 - Prob. 4RQCh. 7 - a. What are the two methods commonly used to...Ch. 7 - Prob. 6RQCh. 7 - Prob. 7RQCh. 7 - Prob. 8RQCh. 7 - For a TOF timer: a. When is the enable bit of a...Ch. 7 - Explain what each of the following quantities...
Ch. 7 - State the method used to reset the accumulated...Ch. 7 - Study the ladder logic program in Figure 7-40 and...Ch. 7 - Study the ladder logic program in Figure 7-42, and...Ch. 7 - Prob. 6PCh. 7 - Prob. 7PCh. 7 - Prob. 8PCh. 7 - Prob. 9PCh. 7 - Prob. 10PCh. 7 - Prob. 11PCh. 7 - Prob. 13PCh. 7 - When the lights are turned off in a building, an...
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- 2. Write the Boolean expression of the given logic circuit as shown below. X. F =arrow_forward3. Design a logic circuit that controls an elevator door in a three-story building. M is a logic signal that indicates when the elevator is moving (M = 1) or stopped (M = 0). F1, F2, and F3 are floor indicator signals that are normally LOW, and they go HIGH only when the elevator is positioned at the level of that particular floor. For example, when the elevator is lined up level with the second floor, F2 = 1 and F1 = F3 = 0. The circuit output is the OPEN signal, which is normally LOW and will go HIGH when the elevator door is to be opened. We can fill in the truth table for the OPEN output as follows: a. Because the elevator cannot be lined up with more than one floor at a time, only one of the floor inputs can be HIGH at any given time. This means that all those cases in the truth table where more than one floor input is a 1 are don't-care conditions. We can place an x in the OPEN output column for those eight cases where more than one F input is 1. b. Looking at the other eight…arrow_forward3. Study the ladder logic program in Figure 7-40 and answer the questions that follow: a. What type of timer has been programmed? b. What is the length of the time-delay period? c. What is the value of the accumulated time when power is first applied? d. When does the timer start timing? e. When does the timer stop timing and reset itself? f. When input LS1 is first closed, which rungs are true and which are false? L1 Input LS1 Ladder logic program Outputs L2 LS1 -TON TIMER ON DELAY Timer T4:0 -(EN)- Time base 1 Preset 10(DN) SOL A-fo Accumulated ° SOL B-of T4:0 SOL A 2 3 4 10 DN T4:0 SOL B DN T4:0 R EN T4:0 EN Figure 7-40 Ladder logic program for Problem 3. Rarrow_forward
- 6. Write the minimized output Y for the logic circuit shown: C Y. Darrow_forwardDesign circuit that has an input w and an output z. The circuit is a sequence detector that produces z = 1 when the previous two values of w were 00 or 11; otherwise z = 0. Use W=0101100010101110101011100010 a) For this problem design the circuit using JK flipflops, draw the state diagram, true table, logic circuit.b) Do the same that as part A but this time use D flipflops: draw the state diagram, true table, logic circuit.arrow_forwardIV. PROCEDURES: For the AND gate look on the data sheets, connect the circuit on Breadboard and test the gate. Using logic switches SW1 and SW2, apply the logic levels 0 and 1 to gate inputs Create a truth table and record the results Also simulate the given gate using the Circuit Wizard simulation software Obtain the corresponding circuit diagram using the simulation software of the Boolean expression F((A,B,C)= АВ* AC * ВС From the obtain circuit diagram develop the corresponding truth table From the figure below obtain the equivalent Boolean expression and develop its corresponding truth Table АП сПо- Boolean Expression: Z= (AB)(CD)arrow_forward
- 6. Predict the output from each gate for the input variables shown: C A D B E Find out the values of C, D, E, F and G (show your calculation how you are getting the numbers) Input: A = 0 and B = 0 Find C, D. E, F, and G Each answer will be either 0 or 1arrow_forwardDesign a logic circuit that controls an elevator door in a three-story building.The circuit has four inputs. M is a logic signal that indicates when the elevator is moving (M=1) or stopped (M=0). F1, F2 and F3 are floor indicator signals. They go HIGH or 1 only when the elevator is positioned at the level of that particular floor. For an example, OPEN is HIGH when the elevator is not moving (M=0) and lined up with the second floor, F2=1, while not lined up with others (F1=F3=0). Also remember that the elevator cannot be lined up with more than one floor at a time, as only one of the floor inputs can be HIGH at any given time.arrow_forward2. Design a logic circuit that controls an elevator door in a three-story building. The circuit has four inputs. M is a logic signal that indicates when an elevator is moving (M=1) or stopped (M=0). F1, F2 and F3 are floor indicator signals that are normally LOW, and they go HIGH only when the elevator is positioned at the level of that particular floor. For example, when the elevator is lined up level with the second floor, F2=1 and F1=F3=0. The circuit output is the OPEN signal which is normally LOW and is to go HIGH when the elevator door is to be opened.arrow_forward
- (a) Write the logic expression for the output 'Y' of the circuit given below. (b) Write the Truth table and pin diagram for EXOR gate.arrow_forwardDevelop a logic circuit necessary to meet the following requirements: A battery-powered lamp in a room is to be operated from two switches, one at the back door and one at the front door. The lamp is to be on if the front switch is on and the back switch is off, or if the front switch is off and the back switch is on. The lamp is to be off if both switches are off or if both switches are on. Let a HIGH output represent the on condition and a LOW output represent the off conditions. The design must include the use of a chip with logic gates and the use of VHDL code.arrow_forwardDesign a logic circuit with input signal A, control input B, and outputs X and Y to operate as follows: When B = 1, output X will follow input A, and output Y will be 0. When B = 0, output X will be 0, and output Y will follow input A.arrow_forward
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