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Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
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Q QN last Q last QN 1 1 1 QN 1 (a) (b) Figure 10-4 S-R latch: (a) circuit design using NOR gates; (b) function table.
Transcribed Image Text:Q QN last Q last QN 1 1 1 QN 1 (a) (b) Figure 10-4 S-R latch: (a) circuit design using NOR gates; (b) function table.
10.8 Sketch the outputs of an S-R latch of the type shown in Figure 10-4 O for the input waveforms shown in Figure X10.8 D. Assume that input and output rise and fall times are zero, that the propagation delay of a NOR gate is 10 ns, and that each time division below is 10 ns.
Transcribed Image Text:10.8 Sketch the outputs of an S-R latch of the type shown in Figure 10-4 O for the input waveforms shown in Figure X10.8 D. Assume that input and output rise and fall times are zero, that the propagation delay of a NOR gate is 10 ns, and that each time division below is 10 ns.
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