Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
expand_more
expand_more
format_list_bulleted
Expert Solution & Answer
Chapter 3, Problem 3.72HW
A.
Explanation of Solution
Given Assembly code:
# long aframe(long n, long idx, long *q)
# n in %rdi, idx in %rsi, q in %rdx
aframe:
pushq %rbp
movq %rsp, %rbp
subq $16, %rsp
leaq 30(,%rdi,8), %rax
andq $-16, %rax
subq %rax, %rsp
leaq 15(%rsp), %r8
andq $-16, %r8
Explanation:
- The instruction “pushq %rbp” creates a stack element and pushes stack pointer.
- The instruction “movq %rsp, %rbp” stores stack pointer into “%rbp”.
- The instruction “subq $16, %rsp” allocates space for “i”.
- It sets “s1” in “%rsp”.
- The instruction “leaq 30(,%rdi,8), %rax” loads value at offset “
- The instruction “andq $-16, %rax” performs “AND” operation between given immediate value and value in register “%rax”.
- The instruction “subq %rax, %rsp” allocates space for array “p”.
- It sets “s2” in “%rsp”.
- The instruction “leaq 15(%rsp), %r8” loads value at offset “
B.
Explanation of Solution
Logic in computation of p:
- The expression for “p” is shown below:
C.
Explanation of Solution
Values of n and s1:
- The details of values are shown below:
| which | e1 | n | s1 |
| Minimum | 1 | even | n%16==1 |
| Maximum | 24 | odd | n%16==0 |
- The details of minimum case are shown below:
- The “e1” cannot be 0, if “e1” equals 0, “p” should be equal to “s2”.
- When “n” is even, “
- Hence, “
D.
Explanation of Solution
Alignment properties:
- The value “p” is been aligned by 16.
- The value “s2” denotes least multiple of 16...
Expert Solution & Answer
Want to see the full answer?
Check out a sample textbook solution
Students have asked these similar questions
It is known that when an information system processes data, a Linked Stack is used, and the name of the indicator pointing to the top of the stack is Top. When the input data enters the system, it needs to be stored in the stack first, and then the information system will extract the data from the stack to perform operations as required.
it is known that the sequence of a set of integer data entering the aforementioned information system is as follows;
27, 98, 24, 9, 83
In the initial stage of the aforementioned information system, the Stack is in an empty state, and in the process of entering the above-mentioned integer data string into the information system, the operation sequence of the Stack is as follows;
Push, Push, Pop, Push, Push, Push, Pop
Please diagrammatically depict the Linked Stack of the information system at each stage of operation
Hi there, any help with the following would be greatly appreciated. Context in the image:Assume a register-based protocol for the function call. Show how this is achieved. You can assume– call-by-value;– variable v is stored in register $s0;– variable f is stored in register $s1.Explain if a stack frame is required, and justify your answer.
Consider the following generic C comparison function and its assembly language representation:
C:
byte comp (byte a, byte b); // a in rdi, b in rei
Assembly:
cmpb
set_inst
ret
Srdi, trsi
Bal
Now show how the condition flags will be set with the corresponding SET instruction and the given values of a and b..
View Available Hint(s)
0
set_inst
setne
setb
setge
seta
a14x49 10
375 49 46
Oxaa
b
-101
0x53
-46
CF
0
0
1
N
ZF
0
0
0
SF
0
1
0
OF
0
0
0
Reset
al
1
1
Help
Chapter 3 Solutions
Computer Systems: A Programmer's Perspective (3rd Edition)
Ch. 3.4 - Prob. 3.1PPCh. 3.4 - Prob. 3.2PPCh. 3.4 - Prob. 3.3PPCh. 3.4 - Prob. 3.4PPCh. 3.4 - Prob. 3.5PPCh. 3.5 - Prob. 3.6PPCh. 3.5 - Prob. 3.7PPCh. 3.5 - Prob. 3.8PPCh. 3.5 - Prob. 3.9PPCh. 3.5 - Prob. 3.10PP
Ch. 3.5 - Prob. 3.11PPCh. 3.5 - Prob. 3.12PPCh. 3.6 - Prob. 3.13PPCh. 3.6 - Prob. 3.14PPCh. 3.6 - Prob. 3.15PPCh. 3.6 - Prob. 3.16PPCh. 3.6 - Practice Problem 3.17 (solution page 331) An...Ch. 3.6 - Practice Problem 3.18 (solution page 332) Starting...Ch. 3.6 - Prob. 3.19PPCh. 3.6 - Prob. 3.20PPCh. 3.6 - Prob. 3.21PPCh. 3.6 - Prob. 3.22PPCh. 3.6 - Prob. 3.23PPCh. 3.6 - Practice Problem 3.24 (solution page 335) For C...Ch. 3.6 - Prob. 3.25PPCh. 3.6 - Prob. 3.26PPCh. 3.6 - Practice Problem 3.27 (solution page 336) Write...Ch. 3.6 - Prob. 3.28PPCh. 3.6 - Prob. 3.29PPCh. 3.6 - Practice Problem 3.30 (solution page 338) In the C...Ch. 3.6 - Prob. 3.31PPCh. 3.7 - Prob. 3.32PPCh. 3.7 - Prob. 3.33PPCh. 3.7 - Prob. 3.34PPCh. 3.7 - Prob. 3.35PPCh. 3.8 - Prob. 3.36PPCh. 3.8 - Prob. 3.37PPCh. 3.8 - Prob. 3.38PPCh. 3.8 - Prob. 3.39PPCh. 3.8 - Prob. 3.40PPCh. 3.9 - Prob. 3.41PPCh. 3.9 - Prob. 3.42PPCh. 3.9 - Practice Problem 3.43 (solution page 344) Suppose...Ch. 3.9 - Prob. 3.44PPCh. 3.9 - Prob. 3.45PPCh. 3.10 - Prob. 3.46PPCh. 3.10 - Prob. 3.47PPCh. 3.10 - Prob. 3.48PPCh. 3.10 - Prob. 3.49PPCh. 3.11 - Practice Problem 3.50 (solution page 347) For the...Ch. 3.11 - Prob. 3.51PPCh. 3.11 - Prob. 3.52PPCh. 3.11 - Practice Problem 3.52 (solution page 348) For the...Ch. 3.11 - Practice Problem 3.54 (solution page 349) Function...Ch. 3.11 - Prob. 3.55PPCh. 3.11 - Prob. 3.56PPCh. 3.11 - Practice Problem 3.57 (solution page 350) Function...Ch. 3 - For a function with prototype long decoda2(long x,...Ch. 3 - The following code computes the 128-bit product of...Ch. 3 - Prob. 3.60HWCh. 3 - In Section 3.6.6, we examined the following code...Ch. 3 - The code that follows shows an example of...Ch. 3 - This problem will give you a chance to reverb...Ch. 3 - Consider the following source code, where R, S,...Ch. 3 - The following code transposes the elements of an M...Ch. 3 - Prob. 3.66HWCh. 3 - For this exercise, we will examine the code...Ch. 3 - Prob. 3.68HWCh. 3 - Prob. 3.69HWCh. 3 - Consider the following union declaration: This...Ch. 3 - Prob. 3.71HWCh. 3 - Prob. 3.72HWCh. 3 - Prob. 3.73HWCh. 3 - Prob. 3.74HWCh. 3 - Prob. 3.75HW
Knowledge Booster
Similar questions
- Translating this C code into assembly language, draw the stack for this function. Suppose the function is called func(0x1234, 'z'). char func(int x, char y) { int a = 0x76; int b = 0xFDBA; } Note: Correct and detailed answer will be upvoted. thank you!!arrow_forwardIn this problem we want to modify the single cycle datapath shown below (also in in slide #1 of "chapter3_single_cycle_datapaths.pptx") so that it supports execution of a new instruction called jump register (jr). PC Add Read address Instruction [31:0) Instruction [25:21) Instruction [20:16] Instruction Instruction [15:11] memory (DMUXT RegDst Instruction [15:0] RegWrite Read register 1 Read register 2 Read data 1 Write Read register data 2 Write data Registers 16 Sign- extend Instruction [5:0] 32 Shift left 2/ ALUSrc (OMUXI) ALU Addresult Zero ALU ALU result ALU control ALUOP #copy contents of "rs" register to PC (PC = $rs) PCSrc ( E3X MemWrite Read data Address Data Write memory data MemRead MemtoReg (-MUXO) jr $rs You are allowed to add new control signal(s), wire(s), muxe(s) to support this instruction. First briefly explain the required modifications. Then indicate the value of each control signal (RegDst, RegWrite, ALUSrc, ALUOP, MemRead, Mem Write, MemToReg). You must use "X"…arrow_forwardExplain the Memory stack organization of 16 locations of stack( 0 to 15). take the initial value of thestack pointer is SP = 0E in Hex. Explain the following push and pop instructions through the Memorystack organization diagram.(1) PUSH R5 WHERE R5 = XX in Hex(2) POP R4 WHERE R4 = (XX + 3 ) Hex for example roll no 64 is having the data in R5 = 64Hex and R4 is ( 64+3 = 67 Hex)arrow_forward
- 1. Consider the following transition system for a stack: empty partial full Write SMV code to build a model for the given transition system.arrow_forwardQ7. ] Given the following ARM64 assembly code for a function, add comments to each line, use its stack frame with corresponding variables, and trace the code execution to figure out what it does. Notice that local variables are stored in the function's stack frame. Hint: this is a void function that takes two input parameters. tunct: sub sp. sp, #32 str x0, (sp, 8] Address Contents x1, [sp) Idr x0, Isp, 81 str SP Sp + 4 Sp +8 Sp + 12 Sp + 16 Sp + 20 Sp + 24 Sp + 28 Idr wo, [x0] str wo, [sp, 28] Idr x0, [sp) Idr w1, [x0] Idr x0, [sp, 8] w1, [x0] Idr x0, Isp) str Idr w1, [sp, 28] str w1, [x0] DOR add Sp. sp, 32 retarrow_forward4.8 For the design entity described below: library ieee; use ieee.std_logic_1164.all; entity myckt is port (a, b, c in std_logic; w, y: out std_logic); end myckt; architecture dataflow of myckt is begin W <= not a or (b and c) ; y <= ((a and b) or c) or (not a and not b); end dataflow; (a) Draw a block diagram of the system with inputs and outputs labeled. (b) Directly translate the architecture to a gate level logic diagram of the circuit (without minimization).arrow_forward
- We have the following C function compiled to RISC-V RV321. The following assembly sequence is equivalent to the C code snippet, but an assembly instruction is missing. what should be XXXX to have an equivalent code? int fun(char a) { fcall(); return a ^ 0x50; } fun: sp, sp,-16 ra,12(sp) s2,8(sp) s2, a0 addi SW SW mv call XXX fcall ra,12(sp) 52,8(sp) lw lw addi sp,sp, 16 jr ra O xori x10,s2,51 xori a0,s2,51 O Another instruction xori a0,s0,80 xori x10,s2,80arrow_forwardTranslate the following C code into RISC-V assembly code. You can only use RV64I and RV64M instructions and cannot use pseudoinstuctions. Note that according to RISC-V spec, “In the standard RISC-V calling convention, the stack grows downward and the stack pointer is always kept 16-byte aligned.”.long long int func(int n) { if (n == 0 or n == 1 or n == 2)return n; else return n*n + func(n - 1) + 8*func(n - 2) + func(n - 3);}arrow_forwardSuppose a malloc implementation returns 8-byte aligned addresses and uses an explicit free list where the next and previous pointers are each 32-bits. Blocks have a 32-bit header and 32-bit footer, where the low-order bit of the header and footer are used to indicate whether the block is allocated (1) or free (0). Furthermore, the block size (which includes the header, payload, footer, and any necessary padding) is rounded up to the nearest multiple of 8, and this size (in bytes) is stored in the header and footer. Assume any padding must be between the payload and the footer.If we call malloc(1), what block size will be allocated, in bytes? With the same conditions as #1, and assuming we've already called malloc(1), if the heap used by malloc starts at address 0x4000 (16384 in decimal), what address would be returned if we then called malloc(32)?arrow_forward
- Question 4 Convert the following C code into ARM assembly code. // pointer to v in X1, n in X2, return prod in X0 double arraytimes(double *v, int n) { int i; double prod for(i=0; iarrow_forward1. Explain the algorithm of an assembly line scheduling problem using dynamicprogramming. You may use examples in your explanation. 2. Find an assembly line scheduling using dynamic programming source codes (Javaprogramming language) from Internet. Alterthe codes to handle random generateof input for different number of stations. 3. Add counters to count the primitive operations executed. 4. Draw a graph that shows f(n) and n, where f(n) is the total number of primitiveoperations performed, n is the number of stations. 5. Discuss the time complexity of the algorithm in term of best case, worst case andaverage casearrow_forwardDesign a memory map to work with 8085 Microprocessor to have 8K byte ROM and 2K byte RAM. ROM should start from memory location 0000H and RAM immediately follows it. Use exhaustive decoding scheme?arrow_forwardarrow_back_iosSEE MORE QUESTIONSarrow_forward_ios
Recommended textbooks for you
Systems ArchitectureComputer ScienceISBN:9781305080195Author:Stephen D. BurdPublisher:Cengage Learning
Systems Architecture
Computer Science
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Cengage Learning