Database System Concepts
7th Edition
ISBN: 9780078022159
Author: Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher: McGraw-Hill Education
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Consider a virtual memory system that can address a total of 32
bytes. You have unlimited hard disk space, but are limited to only 16
MB of semiconductor (physical) memory. Assume that virtual and
physical pages are each 4 KB in size. What is the total size of the page
table in bytes? (Assume that, in addition to the physical page number,
each page table entry also contains some status information in the
form of a valid bit (V) and a dirty bit (D)).
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- Suppose a computer system uses 16-bit addresses for both its virtual and physical addresses. In addition, assume each page (and frame) has size 256 bytes. How many bits are used for the page number? How many bits are used for the offset? 8 bits each. With this system, what’s the maximum number of pages that a process can have? 256 Suppose that each entry in the page table comprises 4 bytes (including the frame number, the valid bit, and miscellaneous “bookkeeping bits”). An OS uses an array to store the page table. What is the size of the page table? 1024 Bytes Furthermore, suppose the first 6 pages of a process map to frames 222 to 227 (as decimal numbers), and the last 5 pages of the process map to frames 1 to 5 (also decimal numbers). All other pages are invalid. Draw the page table, including the valid bit and the frame number. DONE Translate the following virtual addresses to physical addresses, and show how you obtain the answers. (Hint: You do not need to convert…arrow_forwardExercise: A computer has 4 frames. Page size is 2KB (2048). The loaded time, the R and M bits for each page are shown below Page Frame Loaded time M R 11 1 15 3 13 4 5 5 7 6. 3 3 Question: compute the physical address of the following virtual address a) 1000 using FIFO b) 3100 using NRU c) 3100 using LRU d) 6200 using Second chance Note: consider each case separatelyarrow_forwardAssume that a memory module contains three holes of 10MB each. A sequence of 14 requests for 1MB each will be processed (See the diagram below). For each of the memory allocation methods listed below, draw a diagram representing how memory is allocated and determine the sizes of the remaining holes after all 14 requests have been satisfied. First fit Next fit C. Best fit d. a. b. Worst fit Hint - For the Next fit, the following allocation starts with the hole following the previous allocation 10 Mb 10 Mb 10 Mbarrow_forward
- There are many parameters that could be used to describe disk performance; among them are: number of bits per track disk capacity (in bits) number of disk surfaces rotational speed rotational latency transfer rate tracks per surface sectors per track blocks per track sectors per block seek time speed of disk arm block-read time number of blocks Some of these parameters are independent, and others are (approximately) linearly related. That is, doubling one doubles the other. Decide which of these parameters are linearly related. Then, select from the list below, the relationship that is true, to within a close approximation. Note: none of the statements may be true exactly, but one will always be much closer to the truth than the other three. Also note: you should assume all dimensions and parameters of the disk are unchanged except for the ones mentioned. a) If you divide tracks into half as many blocks, then you double the read time for a block.…arrow_forwardSuppose a computer system uses 16-bit addresses for both its virtual and physical addresses. In addition, assume each page (and frame) has size 256 bytes. Could you hand draw the page table, if possible a) Suppose that the OS uses a two-level page table. Draw the page table. (Assume that frames 7 through 221 are free, so you can allocate space for the page table there.) In addition, suppose that the page-table directory storage comprises a whole number of consecutive full frames. (For examples: if the directory entry is 2 bytes, the entry’s storage comprises 1 frame; if the directory entry is 260 bytes, the entry’s storage comprises 2 consecutive frames.) b) What is the size of the two-level page tablearrow_forwardGiventhe following assignment of some program’s virtual pages to physical pages in a system with 4 KiB byte pages, what physical memory address corresponds to virtual address 20000? (All values are given in decimal.)arrow_forward
- 3arrow_forwardLet's pretend for a moment that we have a byte-addressable computer with fully associative mapping, 16-bit main memory addresses, and 32 blocks of cache memory. The following holds true if each block is 16 bits in size: a) Determine how many bytes the offset field is. Measure the tag field's width and height in pixels (b).arrow_forwardQ.2 Suppose a system has a logical address space of size 25 (m=5), a page size of 4 bytes, and a physical memory of 128 bytes. Given the following page table, find out the respective physical addresses for each of the logical address listed in Table 2. (Note: all addresses are expressed in decimal number system) Table 1: Page table 0 2 5 7 0 15 1 2 3 4 5 18 6 20 7 22 Table 2: Fill out this table with corresponding physical memory addresses Logical Address Physical Address 0 6 10 17 23arrow_forward
- A computer uses virtual memory, and a new solid-state drive (SSD) as space for paging. Refer to the last ppt file. In the case presented there, the hard disk drive (HDD) required 25 ms to read in a page, and a rate of 1 page fault per 1000 references introduced a 250 slowdown. If the SSD offers a time of only 80 µs, what is the slowdown in performance caused by 1 pf per 1000 references (you are not concerned with dirty vs. clean pages). What is the maximum rate of page faults you can accept if you want no more than a 5% slowdown in execution using virtual memory? Know your metric prefixes and symbols for time: s for seconds, ms for milliseconds, µs for microseconds, ns for nanoseconds.arrow_forwardConsider a paged virtual memory system in which a process is allocated with 4 frames. The contents of the page map table are given below with two frames being empty. PageActual frame address in memory 4 122 344 477 898 Assume that the order in which the pages appear is the order in which the pages were added to the table (i.e., Page 2 was accessed after Page 4) Assume that the subsequent page accessing is : 1,2,3,4,1,2,5 Using LRU page-replacement algorithm, What frame is accessed by Page 5. 477 O 344 122 O 898arrow_forward
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