Consider the discussion in Section 1.3 of packet switching versus circuit switching in which

A NAND Gate a.Goes HIGH only when all inputs are HIGH b.Goes HIGH if one or the other inputs are HIGH but not both c.Goes HIGH if any input is HIGH d.Goes HIGH only when all inputs are LOW

3- If we increased 2 bits of the ADC quantizer, what is the improving in the SNR will be? Discussed your answer.

I need the drawing of the circuit. "convert the SOP (AND/OR) circuit diagram into one containing only NAND and NOR gates." I have included the picture of the SOP Circuit that needs to be converted. Please draw the circuit clearly and answer question 1 completly, thanks... quick response gets thumbs up