(a) Explain what the Translation Lookaside Buffer (TLB) is. (b) Describe why is the Translation Lookaside Buffer (TLB) crucial to the use of virtual memory.

Extend the memory system of Fig. 12-4 to 4096 bytes of RAM and 4096 bytes of ROM. List the memory-address map and indicate what size decoders are needed. CPU A 16-11 10 7-1 RD W Da Decoder 8185 ADT RAM 889 AD ADT #5 Da Dut RAM2 ADT RAM3 RAM4 889 D ROM ADS Figure 12-4 Memory connection to the CPU.

A computer employs RAM chips of 512 x 16 and ROM chips of 1024 x 8. The computer system needs 4K bytes of RAM and 2K bytes of ROM along with interface unit of 128 registers each. A memory mapped I/0 configuration is used. The two higher order bits are assigned for RAM, ROM and interface as 00, 01 and 10 respectively. a) How many RAM and ROM chips are needed

Since transistors are the primary component of the structure of both cache memory and RAM (Random Access Memory), the question naturally arises as to why we need cache memory when we already have RAM (Random Access Memory) as a volatile memory. This is because cache memory and RAM both use transistors as their primary structural component. This is as a result of the fact that both cache memory and RAM make use of transistors as their major component for constructing their respective structures. Is it feasible to use a single sort of memory for all of the many diverse functions that the computer serves, or is it necessary to make use of a variety of distinct memories?