Suppose we have a byte-addressable computer using a direct mapped caching with 20-bit main memory addresses and 64 blocks of cache. If each block contains 16 bytes, determine: Size of the offset field: type your answer. bits, Size of the block field: type your answer. bits, Size of the tag field: type your answer. bits

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Suppose a computer system uses 16-bit addresses for both its virtual and physical addresses. In addition, assume each page (and frame) has size 256 bytes. How many bits are used for the page number? How many bits are used for the offset? 8 bits each. With this system, what’s the maximum number of pages that a process can have? 256 Suppose that each entry in the page table comprises 4 bytes (including the frame number, the valid bit, and miscellaneous “bookkeeping bits”). An OS uses an array to store the page table. What is the size of the page table? 1024 Bytes Furthermore, suppose the first 6 pages of a process map to frames 222 to 227 (as decimal numbers), and the last 5 pages of the process map to frames 1 to 5 (also decimal numbers). All other pages are invalid. Draw the page table, including the valid bit and the frame number. DONE Translate the following virtual addresses to physical addresses, and show how you obtain the answers. (Hint: You do not need to convert…

Suppose a byte-addressable computer using set-associative cache has 216 bytes of main memory and a cache of 32 blocks, and each cache block contains 8 bytes.Q.) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?