QUESTION 9: Find the change in load current with a change in collector voltage in a Widlar current source. The parameters for the Widlar current source in the following figure are R1 = 9.3 kN, Rg= 10.75 k2, and Io = 11.4 µA. Let ß = 85 and V4= 80 V. Calculate the change in Io as change in Vc2 = 1.3 V. ro2 (MQ) Format : 4.0565 Em2 (mA/V) Format : 0.7822 n2 (kN) Format : 773.9699 Ro (MQ) Format : 78.5957 dlo (HA) Format : 0.0285 Percent change in Io (%) Format : 0.8274

QUESTION 9: Find the change in load current with a change in collector voltage in a Widlar current source. The parameters for the Widlar current source in the following figure are R1 = 9.3 kN, Rg= 10.75 k2, and Io = 11.4 µA. Let ß = 85 and V4= 80 V. Calculate the change in Io as change in Vc2 = 1.3 V. ro2 (MQ) Format : 4.0565 Em2 (mA/V) Format : 0.7822 n2 (kN) Format : 773.9699 Ro (MQ) Format : 78.5957 dlo (HA) Format : 0.0285 Percent change in Io (%) Format : 0.8274

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

See similar textbooks

Similar questions

10 k2, RE = R, = 150 2, r'e = 50 2, and Bac = 50. The For a common-emitter anmplifier, R value of the voltage gain is +Vcc Rc C3 R oVout REI R2 RE2 Select one: a. 67 b. 100 C. 50 d. 28.5
R VD 3cos(1000nt) VOUT 0.7 V What are the minimum and maximum values of Vout assuming the offset model for a diode with Von = 0,7 V for the input signal shown below? Chọn một: O a. Minimum -3 V, maximum 1.4 V O b. Minimum 1.4 V, maximum 3 V O c. Minimum 0.7 V, maximum 3 V O d. Minimum -3 V maximum 0.7 V O e. Minimum -3 V, maximum 3 V
VZENER at D1 is 9.3V with an IZENER of 4mA when active. D2 is a silicon diode and the transistor has a β = ∞ and VBE = 0.7V.What is VA? What is VOUT? What is the power dissipated by the diode D1?
3phase half wave rectifier ,the line voltage(460v).load resistance(R-202).find Vdc, Vrms, PIV, RF, FF. Ans:
a2/a-Design Circint as the following peseripton: A. the positive cycle of the vout signal is 3.2 and Neyatine cycle is 4.3 (Note: we must used preetical Diodes aned vin is tov) B- the pesitive cycles of vout is s-3 od Negative cycle is (5 4) [te:Comsider vin = 1ovavd we must used Capaetor with praeticul Didde)
a2/a.Design Circint as the following pescripton: A- the positive Cyycle of the vout signal is 3.2 and Negate cycle is 4-3 (Note: we must used preetical Diodes and vin is tov) 1B- the positive cycleg of vout is 5-3 and Negative cycle is (5. 4) [note: consider tovavd we must used Cupaetor with praetical Drade) Vin اضف ملف
2. sketch io and Vot for the notwork below for the input shown (Bßoth diodes are Si, Vo= 0,7v), 20V Vo! Vi -20 V 5.3U 7.3V
The Zener diode shown below, is specified to have Vz-20V at Izr, IzK = 0.1 mA, IzT =17 mA, and r, = 14 2. Voc = 30V. 1) Replace the Zener diode with its Model. 2) Find the current I with no Load. 3) Find Vo with no Load when VCC = 30V. 4) Find R1 Min. r30V 2000 Vz = 20V %3D 68-V zener
Q4) * plot * Use ideal diode model Vout vs Vin R Vout
For the circuit given in figure below draw the collector characteristic curves for Ip= 50, 150 and 250 micro amperes on the same graph Re 220 A - Vec 10 V R 10 k Boc= 200 OV-5 V