Please help with detailed explanation for problem C, don't copy solutions from other sources. Consider a byte addressing architecture with 64-bit memory addresses. a)Which bits of the address would be used in the tag, index and offset in a direct-mapped cache with 512 1-word blocks. b)Which bits of the address would be used in the tag, index and offset in a direct-mapped cache with 64 8-word blocks. c)What is the ratio of bits used for storing data to total bits stored in the cache in each of the above cases a and b?

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