Problem 0. The following table gives some of the parameters for a number of different hardware caches. Fill in the table with the values of the missing parameters. Recall that m is the number of physical address bits, C is the cache size in bytes, B is the block size in bytes, E is the associativity, i.e., lines per set, S is the number of sets, t is the number of tag bits, s is the number of set index bits, and b is the number of block offset bits.
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- Suppose a computer using direct mapped cache has 224 bytes of byte- addressable main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. (Note: 64K = 26 * 210) a) How many blocks of main memory are there? b) What is the format of a memory address as seen by cache, i.e., what are the sizes of the tag, block, and offset fields?The following table gives the parameters for a number of differentcaches. Your task is to fill in the missing fields in the table. Recall that m is the number of physical address bits, C is the cache size (number of data bytes), B is the block size in bytes, E is the associativity, S is the number of cache sets, t is the number of tag bits, s is the number of set index bits, and b is the number of block offset bits.) Consider the following sequence of virtual memory references (in decimal) generatedby a single program in a pure paging system:100, 110, 1400, 1700, 703, 3090, 1850, 2405, 2460, 4304, 4580, 3640a. Derive the corresponding reference string of pages (i.e. the pages the virtual addressesare located on), assuming a page size of 1024 bytes. (Assume that page numberingstarts at 0)b. For the page sequence derived above, determine the number of page faults for each ofthe following page replacement strategies, assuming that two (2) page frames areavailable to the program.i. LRUii. FIFOiii. OPT (Optimal)
- The following table gives the parameters for a number of differentcaches. For each cache, fill in the missing fields in the table. Recallthat m is the number of physical address bits, C is the cache size(number of data bytes), B is the block size in bytes, E is theassociativity, S is the number of cache sets, t is the number of tag bits, S is the number of set index bits, and b is the number of block offset bits.Exercise 2: A byte addressable memory has a size of 1024 MBytes. This memory is attached to a direct mapping cache of 32KBytes that contains 1024 lines. a. What is the memory address length? b. What is the block size? c. What is the number of blocks in main memory? d. What is the length in bit of: tag (T), line number (L) and byte number (W)? e. Determine in Hexadecimal the tag (T), line number (L) and byte number (W) of the following Hexadecimal memory address: 000008AE f. What is the block that contains the address 000000DE? g. Which line of the cache can hold the block containing 000000DE?Q1- Write a program in assembly language for the 8085 microprocessor to send one byte of data located at the memory address (3000H) using SOD at a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz. When sending the required byte, you must adhere to the following: The two high bits of the start bits must be sent, after that the data bits are sent, after that the low bit of the stop bit is sent. The following flowchart will help you. The solution must be integrated and include the calculation of the baud rate delay time Transmit Set up Character Bit Counter • Send Start Bit No Wait Bit Time Get Character in Accumulator Output Bit Using Do Wait Bit Time Rotate Next Bit in Do Decrement Bit Counter Is It Last Bit? Yes • Add Parity if Necessary Send Two Stop Bits Return (a)
- Q1- Write a program in assembly language for the 8085 microprocessor to send one byte of data located at the memory address (3000H ) using SOD at a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz . When sending the required byte, you must adhere to the following: The two high bits of the start bits(1 1) must be sent, after that the data bits are sent, after that the low bit of the stop bit (0) is sent. The following flowchart will help you. The solution must be integrated and include the calculation of the baudrate delay timeThe table below shows a segment of primary memory from a Von Neumann model computer Address Data 10101000 10001000 11001000 10011001 10100000 10101010 10110100 10111011 10001100 11001100 The program counter (PC) contains a value of 11001000. Find the value (in binary) that will be placed in MAR (memory address register)? MAR (in binray) %3D Find the value (in binary) that will be placed in MBR (memory buffer register)? MBR = (binray) %3DQ5.Write a multiplication an Intel 8085 assembly program to multiply 2 numbers. The numbers are stored in memory locations 3000H & 3001H. Store the result in memory locations 3002H & 3003H. Show your flow chart and the assembly code. Q6. Answer True or False for the followings: a) Machine code is the assembly code b) Data field is 16 bit while address field is 8 bit c) Trainerkitcanbeused for implementing assembly code d) ADo bus can be used for addressing and datatransfer e) WR and RD pins are on the same pin
- Q1- Write a program in assembly language for the 8085 microprocessor to send 10 bytes of data located at the memory address (3000H to 3009H) using SOD at a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz. When sending each of the required bytes, you must adhere to the following: The two high bits of the start bits must be sent, after that the data bits are sent, after that the low bit of the stop bit is sent. The following flowchart will help you, but you should notice that this flowchart deals with one byte, and you are required to deal with 10 bytes. The solution must be integrated and include the calculation of the baudrate delay time Transmit No Set up Character Bit Counter Send Start Bit Wait Bit Time Get Character in Accumulator Output Bit Using Do Wait Bit Time Rotate Next Bit in Do Decrement Bit Counter Is It Last Bit? Yes Add Parity if Necessary • Send Two Stop Bits Return (a)When it says "memory leaks," what exactly are we talking about when it comes to dynamic memory allocation?Suppose you have an Intel 8086 Microprocessor which is running at a frequency of 50 MHz. Now what is the maximum number of times it can read a byte of data from the memory in 3 seconds? 12500000 37500000 1250000 3750000 Suppose an Intel 8086 Microprocessor is operating at 8 MHz. Which of the following statements are true? ] The clock cycle is 125 ns | In each bus cycle, the clock remains high for 41.25 ns Data is supplied during the 250 ns to 375 ns period in a bus cycle. While reading, ALE stays high during the 125 ns to 250 ns period in a bus cycle. The Status Bus bits becomes available before 250 ns in a bus cycle.