Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN: 9780133594140
Author: James Kurose, Keith Ross
Publisher: PEARSON
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Perform 2's complement in LC-3 Assembly

Implement code to perform 2's complement conversion on R1 in the supplied block.

supplied block-

========================================================

.ORIG x3000

ADD R1, R1, #5

;;;;; Your 2's Complement code here. Convert R1 and store in R2

NOT R1, R1 
ADD R1, R1, #1
LD R2, R1 ;(ERROR-for me this is Line 14)

 

;;;;; End of 2's complement code

Done HALT

.END

=======================================================

I understand how to do 2's Complements on paper, but I am having trouble in putting it in the Assembly code. So far, I am having a problem with Line 14: "Expected label or 9 bit signed PC offset, but found 'R1' instead"

Expert Solution
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Step 1
The above answer shows the code necessary to convert a number to its 2's complement form. In order to understand how this code works, it is important to first understand what 2's complement form is.

STEP 1

 

Assuming this is LC-3 assembly: First, you need to invert all the bits in R1 using the NOT instruction, then add 1 to that value using the ADD instruction: NOT R1, R1 ADD R1, R1, #1 Then, store R1 in R2 using the LD instruction: LD R2, R1
2's complement form is a way of representing negative numbers in binary. In order to find the 2's complement form of a number, the number is first converted to binary. Once the number is in binary, each digit is inverted (1's become 0's and 0's become 1's). Finally, 1 is added to the resulting number. For example, if we want to find the 2's complement form of -5, we would first convert 5 to binary. 5 in binary is 0101. We would then invert each digit, resulting in 1010. Finally, we would add 1 to this number, resulting in 1011. Therefore, the 2's complement form of -5 is 1011. The code provided above does the same thing as the example above, but in LC-3 assembly. The first instruction, NOT R1, R1, inverts each bit in R1. The second instruction, ADD R1, R1, #1, adds 1 to R1. The final instruction, LD R2, R1, stores the value of R1 in R2.

 

 
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