If logical addresses are represented using m bits as shown below, where m=4 and n=2. What is the size of each frame in the main memory? Please explain why. Given the page table and the physical memory as shown on the right, what is the character in the corresponding physical address mapped from logical address 1010?  Please explain why.

Suppose a computer system uses 16-bit addresses for both its virtual and physical addresses. In addition, assume each page (and frame) has size 256 bytes. How many bits are used for the page number? How many bits are used for the offset?  With this system, what’s the maximum number of pages that a process can have?  Suppose that each entry in the page table comprises 4 bytes (including the frame number, the valid bit, and miscellaneous “bookkeeping bits”). An OS uses an array to store the page table. What is the size of the page table?  Furthermore, suppose the first 6 pages of a process map to frames 222 to 227 (as decimal numbers), and the last 5 pages of the process map to frames 1 to 5 (also decimal numbers). All other pages are invalid. Draw the page table, including the valid bit and the frame number.

Can locality of reference be defined, and if so, how does it help speed up memory access?

What advantages over direct translation can segmented memory address translation offer?