Match each of the following from this giving graph ABCD CLA-0.SFT=1 Active O LOAD v After clock pulse 1, for the top figure what would be the output of a shift register when Clear Input=0 A. 1100 and none of the parallel data inputs are active? B. 0011 After clock pulse 2, for the top Figure what would be the output of a shift register when Clear Input=1 and B and C parallel data inputs are active? C. 1001 v After clock pulse 3, for the top Figure what would be the output of a shift register when Clear Input=1 D.010 and none of the parallel data inputs are active? E. 1111 v After clock pulse 4, for the top Figure what would be the output of a shift register when Clear Input=1 F. 0000 and none of the parallel data inputs are active?

Match each of the following from this giving graph ABCD CLA-0.SFT=1 Active O LOAD v After clock pulse 1, for the top figure what would be the output of a shift register when Clear Input=0 A. 1100 and none of the parallel data inputs are active? B. 0011 After clock pulse 2, for the top Figure what would be the output of a shift register when Clear Input=1 and B and C parallel data inputs are active? C. 1001 v After clock pulse 3, for the top Figure what would be the output of a shift register when Clear Input=1 D.010 and none of the parallel data inputs are active? E. 1111 v After clock pulse 4, for the top Figure what would be the output of a shift register when Clear Input=1 F. 0000 and none of the parallel data inputs are active?

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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