Consider a 32-bit computer using byte-addressable memory accessing different types of cache. Each cache consists of 256 blocks with one 32-bit word per block. Specify how many bits are used for the tag, index or set, and byte offset for each type of cache listed in the table below

Please help me with this computer architecture homework

What obstacles must be surmounted to devise a method for replacing cache that is compatible with any address sequence?

Assume 32 bit memory addresses , which are byte addresses. You have direct mapped cache with block-size of 8 bytes  and size of 128 blocks. How many bits will the index , block offset, and tag be ? How many total bits are required for the cache , including the data ?

Suppose a byte-addressable computer using set associative cache has 224 bytes of main memory and a cache size of 64K bytes, and each cache block contains 32 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields? b) If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?

HELP WITH PART A,B, AND C

help with part A B AND C.

A memory system has 4 KB byte-addressable main memory and a direct-mapped cache that consists of 8 blocks with 16 bytes per block. The following shows the main memory address format that allows us to map addresses from main memory to cache. Note: 12 bit address, 4 bit offset, 3 bit $block, and 5 bit tag Assume the cache directory shown below:

Calculate the number of bits used for data and overhead for the following caches A. 64-block/line, direct-mapped, write-through, 8 byte block/line

5. suppose a computer using fully associative cache has 224 bytes of byte-addressable main memory and a cache of 128 blocks, where each cache block contains 64 bytes. a) how many blocks of main memory are there? b) what is the format of a memory address as seen by the cache ; that is, what are the size of the tag and offset field. c) To which cache block will the memory address 0x01D872 map?