CLK Do C lo 20 D₁ C 2₁ 2₁ D₂ C 2₂ Figure 1 . Using the asynchronous ripple counter in Figure 1 and assuming that the propagation delay from an input clock to a change in the output of Q is 9ns, what is the worst-case delay (i.e. longest delay) between an input clock pulse and the counter being in a final state. Give which state(s) of the counter have the worst-case delay.

Given a standard size NAND3 gate followed by an inverter, and then a load capacitance of 100C, if the probabilities of the inputs to the NAND gate are all equal to ½, what is the normalized energy consumed by the NAND gate in units of C?

The following circuit shows the carry-lookahead adder design. Assuming the delay for each gate is 2.2 ns, and there is no fan-in issue (meaning a gate can take as many inputs as possible). Consider a n-bit carry-lookahead adder, what is the duration (in ns) you have to wait until the correct C is generated? Carry-Lookahead Adder Ci+1=g; +pi ci = 8; + Pi (8-1 + Pi-1 C1.1) g+Pi8-1 + PiPi-11-1 = 81+Pi81-1+ Pi Pi-181-2+...+P1 Poco g₁ = xi yi Pi = x; + yi 2.2*(3+7*2) 2.2*3 2.2*8*n 2.2 n "

Consider the following main function. The blank line represents a line of code that is missing. #include <string> #include <iostream> using namespace std; int main() { _______________________ } Write a C++ statement to create a variable called last that can store an employee last name.