Building a Datapath [1.1] Consider the following instruction: Instruction: Interpretation: Reg[rd] = Reg[rs1] AND Reg[rs2] a. What are the values of control signals generated by the control in the Figure below for this instruction? b. Which resources (blocks) perform a useful function for this instruction? c. Which resources (blocks) produce no output for this instruction? Which resources produce output that is not used? Read register 1 ALU operation Read data 1 MemWrite Read register 2 Registers Read MemtoReg Zero ALU ALU ALUSrc Instruction Read data Write result Address data 2 register Write data Data Write data RegWrite memory MemRead Imm Gen

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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Building a Datapath
[1.1] Consider the following instruction:
Instruction:
Interpretation:
Reg[rd] = Reg[rs1] AND Reg[rs2]
a. What are the values of control signals generated by the control in the Figure below for this instruction?
b. Which resources (blocks) perform a useful function for this instruction?
c. Which resources (blocks) produce no output for this instruction? Which resources produce output that is
not used?
Read
register 1
ALU operation
Read
data 1
MemWrite
Read
register 2
Registers Read
Write
register
Zero
MemtoReg
Instruction
ALUSrc
ALU ALU
result
Read
data
Address
data 2
M
u
Write
data
Write
data
Data
memory
RegWrite
MemRead
Imm
Gen
a. or rd, rs1, rs2
b. sub rd, rsl, rs2
c. lw rd, offset (rs1)
Transcribed Image Text:Building a Datapath [1.1] Consider the following instruction: Instruction: Interpretation: Reg[rd] = Reg[rs1] AND Reg[rs2] a. What are the values of control signals generated by the control in the Figure below for this instruction? b. Which resources (blocks) perform a useful function for this instruction? c. Which resources (blocks) produce no output for this instruction? Which resources produce output that is not used? Read register 1 ALU operation Read data 1 MemWrite Read register 2 Registers Read Write register Zero MemtoReg Instruction ALUSrc ALU ALU result Read data Address data 2 M u Write data Write data Data memory RegWrite MemRead Imm Gen a. or rd, rs1, rs2 b. sub rd, rsl, rs2 c. lw rd, offset (rs1)
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