ECE 311 lab report 4

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Illinois Institute Of Technology *

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311

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Electrical Engineering

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Dec 6, 2023

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Laboratory Report 4 ECE 311-L01 By Phu Trinh Partner: Furkan Mohamed Prof. Thomas Wong TA: Zi Wang Lab date: 02/22/2022 Due date: 03/01/2022

Introduction In this lab, the characteristics of diode will be further explored and analyzed to see how some characteristics could allow diode to be used as building blocks for other essential microelectronic circuits. In the lab, the rectifier diode 1N4002 will be observed and implemented in different circuits. The circuits will then be tested with both AC and DC voltage sources. Data Part 1 R iD VD VR rd = VT/iD 1k Ohm, not shunted 9.23mA 0.696V 9.2V 2.71 1k Ohm, shunted 8.46mA 0.690V 9.3V 2.96 100k Ohm, not shutned 94.5uA 0.478V 9.422V 264.55 100k Ohm, shunted 89.8uA 0.476V 9.43V 278.40 Table 1: data recorded of different elements in circuit 4.6 For 1k Ohm case, % difference of current = ¿ 9.23 − 8.46 ∨ ¿ 9.23 ¿ * 100% = 8.34% For 100k Ohm case, % difference of current = ¿ 94.5 − 89.8 ∨ ¿ 94.5 ¿ * 100% = 4.97% Part 6 5V is logic 0, 0V is logic 1 OR circuit VA VB VC 5V (0) 5V (0) 4.94V (0) 5V (0) 0V (1) 0.94V (1) 0V (1) 5V (0) 0.95V (1) 0V (1) 0V (1) 0.72V (1) Table 2: measurements and logic of OR gate circuit AND circuit VA VB VC 5V (0) 5V (0) 4.27V (0) 5V (0) 0V (1) 4.04V (0) 0V (1) 5V (0) 4.05V (0) 0V (1) 0V (1) 0V (1) Table 3: measurements and logic of AND gate circuit.

Waveform Part 3 a) b) c) Figure 1: Output waveform of Limiter (Clipper) circuit: a) V BB = 5V; b) V BB = 3V; c) V BB = 0V Part 4

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Figure 2: Output waveform of Clamped Capacitor circuit. Analysis For the first part of the experiment, since the voltage source V I > 0V, the diode is in forward biased, allowing current to pass through it. Theoretically, the current passing through the circuit could be calculated by using formula i D = V I R . In the case V I = 10V and R = 1k Ohm, the theoretical value i D would be 10mA, but the measured value of i D is 9.23mA, which is slightly smaller than the theoretical value. This is because the diode has a small resistance r D in it that reduced the current passing through the circuit. If using small-signal model analysis, the diode resistor r D could be calculated by the formula r D = V T i D . The thermal voltage V T is assumed to be 25mV at room temperature. For different configuration of the circuit 4.6, the values of r D are recorded as shown in table 1. The resistor r D does not have a fixed value but depend on the thermal voltage and current passing through the circuit. The Amp meter connected directly to the circuit might have small internal resistance as well, but that resistance is not significant. Also, even when the current passing through the circuit changes significantly when using the 100k Ohm resistor, the voltage V D only slightly decreases. The voltage V R does not change much throughout all cases, since the resistor r D << R in, which make the resistance value r D not very significant as well. In the cases when the diode is shunted by a resistor with value R, the equivalent resistance of the circuit will increase slightly, decreasing the current i D . For the case of R = 1k Ohm, the percentage decrease of current is about 8.34%, and for the case R = 100k, the percentage decrease of current is about 4.97%, which are both approximately in the range of 5%- 10%. For the third part of the experiment, the diode is used in the limiter circuit. If the voltage V I is higher than the limiter voltage V BB , then the diode will be in forward-bias and could be considered as a short circuit, which means that theoretically there will be no current passing through the 1k Ohm resistor. The output voltage V O will therefore be equal to the voltage V BB . If the voltage V I is lower than the limiter voltage V BB , then the diode will be in reverse-bias and could be considered as an open circuit, which means that the output voltage V O can be calculated

by using voltage divider formula V O = V I * 10 11 . If the voltage V I is at its peak minimum (which is -7V), the output voltage will have its peak minimum value of -6.4V. For the case when V BB = 5V, when V I > 5V the output will not change and will stay at 5V, making the output waveform to have its top flat out as can be observed in figure 1. For the case V BB = 3V, as V I - becomes larger than V BB , the waveform will get flatten out at 3V. The same thing happens for when V BB = 0V, and the output waveform does not have top half but only bottom. Theoretically for all cases the peak-peak voltage of output signal will be V O peak-peak = V BB + 6.4V because the top peak is equal to V BB and the bottom peak is equal to V O = V I * 10 11 =− 6.4 V , but in figure 1 it could be observed that for all output signals obtained, V O peak-peak = V BB + 7V. It might be because the voltage divider was not set up correctly, making the peak minimum voltage to be V O = V I = 7V. In the fourth part of the experiment, the diode is implemented in a Clamped Capacitor circuit. When the input V I > 0V, the diode in forward-bias and act like short circuit. The capacitor will charge up in this case, and there is no current passing through resistor R, so the output voltage V O is 0V. When the input V I < 0V, the diode in reverse-bias and act like open circuit, making voltage V O to be the same as V I most of the time. Thus, the output voltage will only have the bottom part of the input V I . Because square wave input is used, this fact can hardly be observed; however, it can be seen in figure 2 that the peak-peak voltage of V O is about half of the peak-peak voltage of input V I . In the case V I < 0V, the polarity of V I is flipped, making V I and V C to have the same polarity, so as the capacitor discharge, it will reinforce the voltage value of V I . In other words, for a brief moment of capacitor discharging, V O = V I + V C , and when the capacitor finished discharging, V O will be the same as V I . That small voltage increased in V O mentioned could be calculated as V r = V P fCR = 7.5 V 1000 ∗ 1 ∗ 10 − 6 ∗ 100000 = 0.075 V . That is why when observing figure 2, there is a small slope on the bottom branches of the singal. For the last part of the experiment, the logic circuits are built using diodes. These circuits use negative logic system, meaning that high voltage (5V) will represent logic 0, and low voltage (0V) will represent logic 1. As observed in the data table 2 and 3, even though the voltage values measured at C are not exactly 0V and 5V, they are high/low enough to be classified into the corresponding logic value. Also, from table 2 and 3, the logic of OR gate and AND gate are verified, meaning that the logic circuits built using diodes are working the way they are expected to. Possible source of error: -Human error: mistakes when performing the experiments, using experimental tools, recording data, or computing the results. -Instrumental error: loose components, components malfunctioned, instruments pick up “noise” signal. In addition, during experimental procedure, some of the capacitors did not function correctly, and the capacitors were changed multiple times to get the desired output.

Post lab questions. 1. Assume the question is asking to estimate n and calculate r D using equation (4.19), then compare it to the value of r D obtained using small-signal analysis. Since I D = I S *e VD/(nVT) When R = 1k Ohm 9.23mA = I S *e 696/(n*25) (1) When R = 100k Ohm 94.5uA = I S *e 478/(n*25) (2) Dividing (1) by (2) =>97.67 = e 27.84/n – 19.12/n => n ≈ 2. This n value is the same as the n value assumed in part 1 of pre-lab For R =1k Ohm, i D = 9.23mA, V D = 0.696V For R = 100k Ohm, i D = 94.5uA, V D = 0.478V When using equation (4.19) to estimate r D , r D = 1/( ∂i D ∂v D ) = ∆v D ∆i D = 0.696 − 0.478 9.23 ∗ 10 − 3 − 94.5 ∗ 10 − 6 = 23.86 Ohm This r D value is about ten times the estimated values of r D when R = 1k Ohm and is about 0.1 time the estimated values of r D when R = 100k Ohm. 2. For the waveforms of the Limiter circuit, the peak negative voltage of the output V O in all cases is about 7V, which is the same as the peak negative voltage of the input V I , but that value of 7V is higher than theoretical value as that voltage goes through the voltage divider of, it should have the peak negative value of 7*10/11 = 6.4V. Therefore, all the peak-peak voltages of the waveforms in the limiter circuit are about 0.6V higher than theoretical values. For the waveform of the Clamped Capacitor circuit, even though the waveform shows the desired characteristics, its value is not totally correct. Since the input signal is 15V pp , theoretically the output should be about 7.5V pp (ignoring V r since as calculated above Vr = 0.075V <<V I max ). However, in the waveform shown in figure 2 the peak-peak voltage of the output signal is about 9.2V, which is quite different from the theoretical value. Conclusion

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This lab has helped to become more familiar with diode and the process of implementing some essential circuits using diode as building block. Like the op-amp, in real life the diode can have a small internal resistance value that can be estimated using different methods, and that internal resistance can affect the readings of different circuit components to a certain degree. In this lab, the limiter and clamped circuits are recreated successfully. The output waveforms represent the desired characteristics of those circuits; however, the actual magnitudes of those waveforms do not totally agree with the theoretical values due to multiple reasons. This lab has shown that the characteristics of diode could be used in many different circuits.