Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
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Chapter 4, Problem 4.52HW
The file seq-full.hcl contains the HCL description for SEQ, along with the declaration of a constant IIADDQ having hexadecimal value C, the instruction code for iaddq. Modifythe HCL descriptions of the control logic blocks to implement the iaddq instruction, as described in Practice Problem 4.3 and Problem 4.51.See the lab material for directions on how to generate a simulator for your solution and how to test it.
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Excersize 2: Sketch a schematic of the circuit described by the following VHDL code. Simplify the
schematic so that it shows a minimum number of gates.
library IEEE;
use IEEE.STD LOGIC 1164.all;
entity exercise2 is
port (a: in
y: out STD_ LOGIC_VECTOR (1 downto 0));
STD LOGIC_VECTOR (3 downto 0);
end;
architecture synth of exercise2 is
begin
process (all) begin
a (0) then y <= "11";
elsif a (1) then y <= "10";
elsif a (2) then y <= "01";
elsif a (3) then y <= "00";
y <=
if
else
a (1 downto 0);
end if;
end process;
end;
2. Design a circuit to implement the following pair of Boolean equations:
F = A(CE' + DE) + A'D
G = B(CE' + DE) + B'C
To simplify drawing the schematic, the circuit is to use a hierarchy based on the factoring
shown in the equation. Three instances (copies) of a single hierarchical circuit component
made up of two AND gates, and OR gate, and an inverter are to be used. Draw the logic
diagram for the hierarchical component and for the overall circuit diagram using a symbol for
the hierarchical component.
Task
In your group, design and simulate a combinational logic circuit that consists of three or four
inputs and at most three outputs. You are required to come up with your own problem and
solution, which can by anything related to the environment, relationships, people, vehicles,
machines, etc. You need to perform the following:
> In your group, brainstorm a suitable problem to be solved
> Devise a concise description of the problem
> Draw a block diagram of the problem
> Develop the truth table for the problem
> Solve the minimum expression for the problem using K-Map
Implement the logic circuit using basic gates
> Realize your design using the Intel Quartus Prime software by schematic entry
• Create a new project in Quartus II
• Create a new Block Diagram/Schematic File and draw your circuit
• Compile your design
• Perform a timing simulation of your design
> Verify that your system functions correctly
Submission
Each group will need to submit a report (at E-learning website) which…
Chapter 4 Solutions
Computer Systems: A Programmer's Perspective (3rd Edition)
Ch. 4.1 - Prob. 4.1PPCh. 4.1 - Prob. 4.2PPCh. 4.1 - Prob. 4.3PPCh. 4.1 - Prob. 4.4PPCh. 4.1 - Prob. 4.5PPCh. 4.1 - Prob. 4.6PPCh. 4.1 - Prob. 4.7PPCh. 4.1 - Prob. 4.8PPCh. 4.2 - Practice Problem 4.9 (solution page 484) Write an...Ch. 4.2 - Prob. 4.10PP
Ch. 4.2 - Prob. 4.11PPCh. 4.2 - Prob. 4.12PPCh. 4.3 - Prob. 4.13PPCh. 4.3 - Prob. 4.14PPCh. 4.3 - Prob. 4.15PPCh. 4.3 - Prob. 4.16PPCh. 4.3 - Prob. 4.17PPCh. 4.3 - Prob. 4.18PPCh. 4.3 - Prob. 4.19PPCh. 4.3 - Prob. 4.20PPCh. 4.3 - Prob. 4.21PPCh. 4.3 - Prob. 4.22PPCh. 4.3 - Prob. 4.23PPCh. 4.3 - Prob. 4.24PPCh. 4.3 - Prob. 4.25PPCh. 4.3 - Prob. 4.26PPCh. 4.3 - Prob. 4.27PPCh. 4.4 - Prob. 4.28PPCh. 4.4 - Prob. 4.29PPCh. 4.5 - Prob. 4.30PPCh. 4.5 - Prob. 4.31PPCh. 4.5 - Prob. 4.32PPCh. 4.5 - Prob. 4.33PPCh. 4.5 - Prob. 4.34PPCh. 4.5 - Prob. 4.35PPCh. 4.5 - Prob. 4.36PPCh. 4.5 - Prob. 4.37PPCh. 4.5 - Prob. 4.38PPCh. 4.5 - Prob. 4.39PPCh. 4.5 - Prob. 4.40PPCh. 4.5 - Prob. 4.41PPCh. 4.5 - Prob. 4.42PPCh. 4.5 - Prob. 4.43PPCh. 4.5 - Prob. 4.44PPCh. 4 - Prob. 4.45HWCh. 4 - Prob. 4.46HWCh. 4 - Prob. 4.47HWCh. 4 - Prob. 4.48HWCh. 4 - Modify the code you wrote for Problem 4.47 to...Ch. 4 - In Section 3.6.8, we saw that a common way to...Ch. 4 - Prob. 4.51HWCh. 4 - The file seq-full.hcl contains the HCL description...Ch. 4 - Prob. 4.53HWCh. 4 - The file pie=full. hcl contains a copy of the PIPE...Ch. 4 - Prob. 4.55HWCh. 4 - Prob. 4.56HWCh. 4 - Prob. 4.57HWCh. 4 - Our pipelined design is a bit unrealistic in that...Ch. 4 - Prob. 4.59HW
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