Chapter 7, Problem 2TFQ

Q1) for the gated D latch, determine the Q and Q for the inputs in the figure below, show them the proper relation to the enable input, assume the Q starts RESET. EN

If both inputs of the SR latch with NAND gates are 0: a. the output is toggled b. the output is set c. the output is reset d. the input is not allowed

A cross coupled NOR latch is shown below. The inputs S and R are supplied with the waveforms shown. Sketch the output waveform at Q. S R R

omplete the timing diagram for the gated latch shown below. S R EN O Q is initially LOW S A EN S P 票。

You wish to create a circuit that functions similarly to an SR latch but accepts the input S1R1=11 and executes the function "invert." As seen in the circuit below, this will need feedback. A) Create the Truth Table for this circuit B) Design the circuit that satisfies the requirement

If both inputs of the SR latch with NAND gates are 1: a. The output is not changed b. the output is set c. the input is not allowed d. the output is toggled

a) The only difference between a Latch and a flip-flop is that flip flop requires a b) Latches are used to store c) The SET state in active low S-R latch is when Q.........

Ex4: Design a counter with 7 flip-flops that goes through the following binary repeated sequence: 0, 1, 3, 7, 6, 4. Show that when binary states 010 and 101 are considered as don't care conditions, the counter may not operate properly. Find a way to correct the design with don't care and without don't care The number of flip-flops required is three. • Table below shows the desired circuit excitation table. Present Next Flip-flop inputs state state ABC ABC TA TB C 000 001 0 0 1 001 011 0 1 0 010 XXX X X X 011 111 1 1 0 100 000 1 1 0 101 XXX X X X 110 100 0 1 0 111 110 0 0 1

Obtain the waveform of output states Q and for the D latch when the input condition as in Figure 5 is given ( explain your result )