Programmable Logic Controllers
5th Edition
ISBN: 9780073373843
Author: Frank D. Petruzella
Publisher: McGraw-Hill Education
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Expert Solution & Answer
Chapter 4, Problem 4P
Explanation of Solution
a.
Data stored in the destination address of AND operation:
- In AND operation, the output is always HIGH when all the inputs are HIGH and the output is LOW when any of the inputs are LOW.
- The AND operation of two inputs “Source A” and “Source B” is given below. Here, the result is stored in destination address.
- If both the inputs “Source A” and “Source B” are 1, then the output 1 will be displayed on the destination.
- Otherwise, if either of the inputs “Source A” or “Source B” is 0, then the output 0 will be displayed on the destination.
Source A:
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 |
Explanation of Solution
b.
Data stored in the destination address of OR operation:
- In OR operation, the output is always HIGH when any of the inputs are HIGH and the output is LOW when all the inputs are LOW.
- The OR operation of two inputs Source A and Source B is given below. Here, the result is stored in destination address.
- If either of the inputs “Source A” or “Source B” are 1, then the output 1 will be displayed on the destination.
- Otherwise, if both the inputs “Source A” and “Source B” are 0, then the output 0 will be displayed on the destination.
Source A:
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 |
Explanation of Solution
c.
Data stored in the destination address of XOR operation:
- In Exclusive-OR (XOR) operation, the output is always HIGH when either of the inputs is HIGH and the output is LOW when all the inputs are either HIGH or LOW.
- The XOR operation of two inputs Source A and Source B is given below. Here, the result is stored in destination address.
- If either of the inputs “Source A” or “Source B” are 1, then the output 1 will be displayed on the destination.
- Otherwise, if both the inputs “Source A” and “Source B” are 0 or 1, then the output 0 will be displayed on the destination.
Source A:
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 |
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Section 3: The Control Unit For the Control Unit, you can simply use an 8-bit input switch or otherwise, which will act as the control wordinput to the data-path (we will not focus on using a control store nor selector). The control word input shouldbe based on the format shown in table 2. These values should be sent to the data-path to accomplish a giventask. In addition to the control word, you will need to implement a way of ensuring the correct register(s) areselected to either input (LOAD) or output (Open Enable) a value. Again, think about using a multiplexer orotherwise. For X0, you will not be using the value, but include it in the design.3X0 C0 C1 B0 B1 F2 F1 F0Table 2: Control Unit control word format
From the given code from step 1-step19
a- What are the memory location addresses that will be accessed in memory data segment in this program?
b- What is the content of each memory location accessed in memory data segment in this program?
c- What does the content of each memory location refer to?
Convert below expression into three address code
a := (c+d) * (c+b)
Chapter 4 Solutions
Programmable Logic Controllers
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- Use the following data declarations: .data byte Val word Val sbyte 1, 2, 3, FCh word 1000h, 2000h, 3000h, 4000h dwordVal dword 34567890h, 90785634h, 0Ah, 33445566h Show the value of the final destination operand after each of the following code fragments has executed: (If any instruction/s is invalid, indicate "INV" as the answer and briefly explain why) a. mov bh,byteVal+2 b. mov edx,1 C. add dx,[wordVal+4] mov ecx,5 xchg ecx,[dwordVal+12] d. mov ah, byte Val+3 sub ah,[ byte Val+0] sub ah,[ byte Val +2] e. mov eax, dword ptr dwordVal+7 f. movsx cx,byteVal+3 answer bh= answer edx= answer ecx= answer ah= answer eax= answer (show your answer in binary) CX=arrow_forwardUse the following data declarations. Assume that the offset of byte Val is 00000000: .data byte Val sbyte 1,2,3.-7h word Val word 1000h.2000h 3000h, 4000h dwordVal dword 34567890h, 90785634h, 1234674Sh Show the value of the final destination operand after each of the following code fragments has executed: (If any instructions is invalid, indicate "INV" as the answer and briefly explain why) a. moy di 2 mov al, byte Val[di] b. mov bx, word Val mov esi, offset wordVal+4 xchg bx, [esi] R c. movsx cx, byte Val+3 d. mov ax, word ptr [dwordVal mov bl. byte ptr [dwordVal +10] e. mov al, 80h number add al 40h signed ;signed number answer al-= answer bx= answer (show your answer in binary) CX- answer |esi= answer bl= SF=arrow_forwardaddressing mode is most suitable to change the normal sequence of execution of instructions. А. Indirect В. Index with Offset C. Relative D. Immediatearrow_forward
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- Explain the significance of "carry-in" and "carry-out" in ALU arithmetic operations.arrow_forwardDuring a 1/0 read: [select all that are true] The address flows in to the MPU RD = 0 The address is sent out by the MPU WR =0 Data flows out from the MPU Data flows to the MPUarrow_forwarddestination register after each of the following instructions executes in sequence, given that CL, DX, and AL are initialized to 3, 1001111010111100, and 01010111 respectively? Leave your answer in binary form for this question rol dx, clarrow_forward
- a. Find the address accessed by each of the following instructions. If DS = 0100H, BX= 0120H, DATA = 0140H, and SI = 0050H and real mode operation:1. MOV DATA[SI], ECX2. MOV BL, [ BX+SI]b. Descriptor contains a base address of 00260000H, a limit of 00110H, and G = 1,determine starting and ending locations are addressed by the descriptor for aCore2.arrow_forwardC codes on the following Read and Write? Read a byte (into TMP, where TMP is at GPR address = 0X60)) from GPR at address 0X1C3 (Bank 3)arrow_forwardA set of ten packed BCD numbers is stored in the memory location starting at 3050H. i. Write a program with a subroutine to add these numbers in BCD. If a carry is generated, save it in register B, and adjust it for BCD. The final sum will be less than 9999sCD. ii. Write a second subroutine to unpack the BCD sum stored in registers A and B, and store them in the memory locations starting at 3070H. The most significant digit (BCD4) should be stored at 3070H and the least significant digit (BCD) at 3073H.arrow_forward
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