What steps will we take if the data bus is only 16 bits wide but our instruction is 64 bits long? What outcomes can we anticipate if the data bus is only 16 bits wide but our instruction is only 8 bits long?

A gaming device has to transfer a high definition 1280 x 720 x 3 video frame @ 30 frames/sec. The 32-bit system bus operates at 100MHz clock. It takes one clock cycle to make one transfer through the bus (i.e. D=1) and there is an overhead of ten clock cycles per transfer (i.e. O=10) Is this bus suitable for this system? If not, then what can be done to make it suitable? Explain. What if the bus operates in burst mode (burst size of 4)? Would it be suitable to use? Explain.

Computers designed using the Harvard architecture have two buses: one for data and one for instructions.