This is a High Performance Computing question: 2. Considering the Merge Sort algorithm. What parallel pattern(s) would you use to write a GPU implementation using CUDA? explain your reasoning in detail.

Regarding RISC-V: Considering the case of adding two positive 32-bit integers and placing the result in a 32-bit register:  Under what scenario would there be an overflow? Please show a quantitative example to demonstrate the overflow?  From the example above, how can we detect this overflow?   Since there are 32 bit-wise additions that need to be done for adding these 32-bit integers, this addition operation may be slow. To improve the performance, one straightforward idea is to use 32 1-bit address and do the 32 bitwise additions all at the same time. Do you think this straightforward idea would work (i.e generate correct result and achieve the anticipated performance improvements) and why?

The distinction between parallel and serial programming is clear.

Describe how "multiplexing" and "demultiplexing" operations occur in the OSI model.