The main disadvantage of the Common Gate MOSFET Amplifier is Select one: a. Has very low output impedance. b. Has very high output impedance. e. Has very high input and output impedance . d. Has very high input impedance. e. Has very low input impedance.

The amplifier in the circuit below is driven by a signal generator v, with a small sine wave signal vhose average value is zero. Assume the transistor has a value of B-100, and V-26 mV. a. You need to design the circuit so that the de emitter current IE of the emitter resistor RE to establish the desired de emitter current. = 1 mA. Specify the value b. A de collector voltage of +5 volts is desired. Specify the value of the collector resistor Re to establish the desired de collector voltage. For this part assume that RL 5 K and the Early Effect needs to be considered. The transistor has a VA 100 Volts. Draw the ac small signal equivalent circuit model of the amplifier and determine its voltage gain. 91SV C. 2.5k MM do RE -15 V 84 Vout RL

a) Assume that i) both the coupling capacitors and the emitter capacitance are large enough to have zero impedance (i.e. short circuits), ii) the frequency of input signal is low enough to ignore transistor internal capacitances. Consider the common emitter (CE) amplifier shown in Figure Q1.a. 1) Draw the low-frequency small signal equivalent circuit considering the above assumptions. 2) Show that the maximum voltage gain is Ay(max) = –40lcRc if ro « Ta, (R1//R2) » r7, Tq » Rs, R, » Rc. o+V ce R C. R, Rs C. RL R, RE OV Figure Q1.a

6) Consider the following multistage amplifier. Draw the corresponding small signal model. Label, Vin, Vo1 and Vo. Do NOT make any approximations. Do NOT perform small signal analysis with this model. Just draw the small signal model. Show your work! Vin Vcc malli Q1 Re1 Vo1 Vcc ww1. Rc2 Q2 Re2 Vo

which of the following configurations has low impedance and high output impedance?   a. common-base. c. common-collector. b. common-emitter. d. all of these.

A. Detemine the value of the collector resistor in an npn transistor amplifier with Ppc = 250, VBB = 2.5 V, Vcc = 9 V, VCE = 4 V, and Rg = 100 k2. B. Detemine Icsat) for the transistor in below Figure. What is the value of IB necessary to produce saturation? What minimum value of VIN is necessary for saturation? Assume %3D VCE(sat) = 0 V. +5 V 10 kN Rg VINO BDc = 150 1.0 MN

A. For the configuration shown below in 4(A), find the small signal voltage gain (Voutp-Voutm)/Vin B. For the configuration shown in 4(B), find the following parameters (a) DC value of output voltage, (b) input common mode range and (c) small signal voltage gain when all transistors are in saturation vou/Vin as indicated in the diagram; Assume no body bias on M1 ad M2 For this problem ONLY, assume the following device parameters V7, = \V| = 0.5V;K, = k ,' = 100 µA / V²,a, = a, = 0.01 VDD = 3V (10/1) M, M. (10/1) (10/1) M, |M, (10/1) Voutp 20kΩ м, (200/1) м, м, (10/1) м, Vin (1/1) м, M. (10/1) + Vin DC VAN M, 100HA (1/1) M, M, (10/1) (A) (B) V. =-1V

This problem is AC analysis problem. DC analysis is not needed to answer the question. A) Convert this bias circuit into a bypassed common source amplifier that has an output across a load resistor (RL). To do this you should draw three capacitors on the figure below, an input voltage source, and any resistors you think that should be added. B) In the space below the figure, Draw the hybrid n model for this amplifier circuit including all voltages and resistors. Label Vi, Vgs, and vo on the model. Assume the capacitors you add act as short circuits at AC. Be sure to include resistors R1, R2, R3, R4, and RL in the hybrid pi model. > When you "verify" a mode of operation you will need to calculate all three voltages (Vc, V8, VE for BJTS and VG, Vs, Vo for MOSFETS) and show the correct two conditions are satisfied. > Assume Capacitors acts like open circuits at DC and short circuits for AC. > Assume the following: o Beta = 100 O VBE = 0.7 12V o V (Thermal) = 26 mV o V (Threshold) = 2V O…

2. A single transistor amplifier is shown in the circuit to the right. The input is a 100 kHz sine wave from a very low impedance source, with a 1 mV peak-to-peak amplitude. hfe, the forward current gain of the transistor, is 300. The base reverse leakage current is 1 nA. The ideality factor for the base-emitter diode is 2, so nkT= 50 mV. a. What are the voltages relative to ground and the currents flowing into, into, and out from the collector, the base, and the emitter, respectively? b. What is the impedance of the 1 µF capacitors at 100 kHz and what effect will this have on the gain of the amplifier? c. What is the gain of the amplifier and how does it depend on the hfe of the transistor? Luff Vin maits Ik { +V₁ = +15V املا Vo Sik Y 1 Fb V₂ I m Vout MF 2K = 250 hfő - -15V --Y₂

4. A Darlington transistor is essentially an array of two transistors connected as shown below. Assume both transistors follow our simple model with a current gain of B=100. Determine the maximum value of R2 that will just saturate the transistors, and pass full current through the load resistance R1. v2 V2 R2 PULSE (0 5 0) Q2 NPN R1 10 Q1 NPN V1 24