The circuit below is a 4-bit shifter with 2 control inputs s1 and s0, 4 data inputs 13, 12, 11, and 10, and 4 data outputs Q3, Q2, Q1, and Q0. If the input 13 12 11 10 = 1101, what is the final output when s1 s0 = 01 and then 11 next clock cycle ? 13 12 I1 IO s1 s0 Q3 Q2 Q1 QO 0000 0010 0110 O 1010

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