Suppose we have a byte-addressable memory of 20 bytes, built using 4 modules. Draw  diagrams showing the distribution of addresses within each module, if we are using (a) high order interleaving, and (b) low-order interleaving.

Registers in RISC-V are 64-bit.  For the sake of simplicity, consider the following instructions operating on 32-bit registers.  Assume that registers x5 and x6 hold the values 0xBBBBBBBB and 0x00000000, respectively. What is the value in x6 for the followingslli x6, x5, 6 Using the result from the part above, what is the value in x6 for the following instruction.            srli x6, x6, 6

Suppose the RAM for a certain computer has 4M words, where each word is 16 bits long. What is the capacity of this memory expressed in bytes? If this RAM is byte addressable, how many bits must an address contain? If this RAM is word addressable, how many bits must an address contain?

Show how the decimal value 2019111310 would be stored by byte-addressable machines with 32-bit words, using little endian format and then big endian format. Assume the value starts at address 201916. Draw a diagram of memory and place the appropriate values in the correct (and labeled) memory locations.

Given a computer with 300 memory locations, each 18-bit assessable, how many bits of addressing are needed?  Given a computer with 10-bit addressability and 5 bits for the address, what's the maximum number of memory this computer can have in bits?