Suppose that Q1 = 1 and Q2 = 0 is the initial state of the two JK flip-flop circuit shown. What is the state of the circuit after applying two complete clock pulses? Q1 Q Q2 Q J 1- K 1 K Q

Compute the Boolean expression for the digital circuit diagram below with the corresponding Truth table:

Given is the following circuit containing an AND gate and a D flip-flop. E & C a) Complete the truth table of this circuit. EC Q Q+ 1D Q G1 b) Draw the waveform of the output Q in the given timing table. C E Q L 1 ++ -T+ --+ 1-1-+ רזח וזהרזח -1- T וזה -- ++---++-1-++---+---+---++---+---++-|--+---+---+ +-|-+ +--1 ־ד ־ ז ־ז־ז־ז־ ז ־1־רז P ד - ־־- IF I

The output of the logic circuit is ... A exnor B A exor B A or B A and B