Suppose a program with 70% parallelism is running on a dual-core processor (2 cores). Which would provide a better performance benefit: increasing the parallelism to 90% or increasing the number of cores to 4 cores? Show your calculations to support your answer.

Consider a 32-bit microprocessor, with a 16-bit external data bus, driven by an 8-MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate across the bus that this microprocessor can sustain in bytes/s? To increase its performance, would it be better to make its external data bus 32 bits or to double the external clock fre- quency supplied to the microprocessor? State any other assumptions you make and explain. Hint: Determine the number of bytes that can be transferred per bus cycle.

As a simple model of a bus-based multiprocessor system without caching, suppose that one instruction in every four references memory, and that a memory reference occupies the bus for an entire instruction time. If the bus is busy, the requesting CPU is put into a FIFO queue. How much faster will a 64-CPU system run than a 1-CPU system?

What is the impact of a cache miss on a pipelined processor's performance?

Explain the concept of instruction-level parallelism (ILP) and its role in pipelining. How does ILP enhance instruction throughput in a pipeline?

What is the concept of VLIW (Very Long Instruction Word) architecture, and how does it achieve parallelism in instruction execution? Provide examples of VLIW processors.

As a sort-of prediction for your midterm assignment, how many CPU cores do you think is ideal? Hint: think about Amdahl's Law, which describes the theoretical maximum speedup for a parallel program.

A multiprocessor consists of 100 processors, each capable of a peak execution rate of 2Gflops. What is the performance of the system as measured in Gflops when 2% of the code is sequential and 98% is parallelizable?

Discuss the concept of instruction-level parallelism (ILP) and how pipelining contributes to increasing ILP in modern CPUs.