Q5 (12 Marks) Улезнод Design a CMOS circuit to implement the logic function. The design should not include a CMOS inverter at the output. 06 112 Markel F= ABC + ACD + ACD

a) A standard TTL inverter gate is shown in the figure. The supply voltage is 5V. Calculate the output voltage for both logic low and logic high input cases assuming input voltages respectively as 0.11V and 4.2V. Br= 130; BR = 0.24. You can make approximations when needed. Br = IcIs active region; BR = IE/ls inverse active region b) Assume you connect a resistor of 1.8K to the output of the circuit when the output is at logic high. What will be the change in the output voltage? 1302 R3 1.6k2 R, 4k2 Input o T, Output T, V, V. IkQ R,

Draw the circuit schematic for a two-input NMOS CML XOR gate.