Q2. A state machine implemented using D Flip Flops is shown in Figure 1. (a) Write down the state transition table for this system (b) Using the above, derive the state diagram for this system D Q Q -Q CK XIN CK CLK-

The process steps required for synchronous counter design are written below. In which option is it sorted correctly? 1. State diagram is drawn II. The cells of the Kamough diagram are grouped II. The NEXT state diagram is derived from the state diagram IV. J and K states are placed in Kamo tables V. The transition table showing the flip-flop inputs is developed. VI. Logic circuits of simplified logic expressions are established. 34 - O A) 1- I| - I|-V-N- VI B) 1- II| -V-V- ||- VI O 9 1- II| –V-- M- V- || O D I- II| –V- M-V- VI O E I- I|-- |||-V-V VI

Question 1) If six NOT (inverters) gates are connected in series and the input to the first gate is a LOW (0) the output of the FIFTH. gate will be:

A logic program produces set of logic data as depicted in the Table 2 below. This logic program consumed around of 1MB of memory space if it was to be stored in a PLC. However, the PLC is only capable of storing around half of the required size.   (a) What will you do to solve this problem? (b) By using solution suggestion in question (a), propose the new logic function (c) Determine the type and numbers of logic gates are required for the new logic function (d) Draw the logic gate

Q) You want to design a synchronous counter sequential (sequential) logic circuit. Counting from 0 to 9 and will not count the last two digit of your student number. (a) List the steps that you will apply in the design approach. State Chart and State Create the table. (b) Design the sequential circuit using JK Flip-Flop. Explain each step. Desired action show that you have done it. " last two digit student num: 0 4 " Not : I want the solution to contain tables and equations, and the electrical circuit resulting from tables and equations, as in the picture that I attached,And if possible, I want the solution on paper if possible.

Obtain the state diagram for the following state machine. Consider that the flip flop above is the MSB.

Implement the logic circuit in Figure 2 using only NAND gate A B C X

1. Write down excitation equations for flip flops A and B 2. Draw the table which shows inputs, present states, next states and outputs 3. Draw the state transition diagram 4. In words, describe the function this circuit is performing 5. Is this a Mealy Machine or a Moore Machine ? y DA A DB B Figure 1

9 Part 1 of 2 Mc Graw Hill Required information Consider the logic gate circuit shown in the given figure. A (S1)-0- B (S2)-0 C (S3)-0- AB B BC B+C What is the Boolean equation for the given figure? ***************** The Boolean equation for the given figure is (Click to select) Note: This is a multi-part question. Once an answer is submitted, you will be unable to return to this part.

LOGIC GATE ( NEED ONLY HANDWRITTEN SOLUTION PLEASE OTHERWISE DOWNVOTE).