(a) Design a ripple (Asynchronous) counter that counts from 5 to 13 using JK flip flops and any required logic gates. (b) Using logic gates, design a 2-4 decoder.
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- 5- a- what are the application of Flip – Flop. b- What is the difference between the Flip – Flop circuit and the other combinational logic circuits?The ASM chart shown in Figure 4 specifies a synchronous sequential logic circuit. Derive a suitable state table from the ASM and design the circuit for the state table using JK flip-flop and logic gates.Explain the function of Multiplexer and, Draw the 2 x 1 multiplexer logic circuit diagram and function table. How many selection inputs are required for a 4096 x 1 Multiplexer?
- A d. B Figure 1 3. Referring to the logic circuit in Figure 1, determine: a. The simplified Boolean expression. b. The output waveform. C H c. Due to fabrication errors, lines d and f were shorted to the supply voltage. What happens to the output of the circuit? d. Your hardware resources are limited to 2-input NOR gate only. Draw the gate schematic of the simplified Boolean expression in 3(a).O Determine the Q output waveform of the flip flop in the Figure Q4(a). Figure Q4(a) Clock Clock PC (a) Design 5-bit (Serial in/ Right /Parallel out) shift register.The logic diagram of JK flip-flop is given in Figure 3.a) Write the output Boolean functions for the outputs.b) Draw the timing diagram of the circuit on Figure 4. Assume that the delay between JK inputsand QQ outputs is 1 unit. Each column in Figure 4 represents 1 unit.
- Design a 4-bit synchronous binary upcounter using T flip-flops. Draw only the logic diagram. Please show the process.Design a serial adder using the following: Explain the operation briefly, list thestate table (must include present state, inputs, next state, output and flip-flopinputs) and draw the logic diagrama. Using D flip flop, shift registers and necessary logic gatesb. Using JK flip flop, shift registers and necessary logic gates(a) Consider a combinational logic circuit in Figure Q.2 (a).i and Q.2 (a).ii. Determine the Boolean equation for the output Y and then, replace the circuit with a single logic gate. Figure Q.2 (a)i Vpp Voo Figure Q.2 (a)ii
- 9 Using D flip-flops, (a) Design a counter with the following repeated binary sequence: 0, 1, 2, 4, 6. (b) Draw the logic diagram of the counter. (c) Design a counter with the following repeated binary sequence: 0, 2, 4, 6, 8. (d) Draw the logic diagram of the counter.9. Analysis of Synchronous Counters, in the following figure, write the logic equation for each input of each flip-flop. Determine the next state for state 010,011,100,111 as Q2Q1Q0 sequence. FF0 FFI FF2 Ko K, K2 CLKa) Design a combinational circuit that would take a 3-bit binary number and generate an output if the input value in decimal is either divisible by 2 or 3. iii) Explain and show how you would implement this circuit using a 4-to-1 Multiplexer and other appropriate logic gates. Use a block diagram for the multiplexer.