Q1. Design a simple circuit from the function Y by reducing it using appropriate k-map , draw corresponding Logic Diagram for the simplified Expression Truth Table D C B A Y 0 0 0 0 0 0 1 0 0 0 1 1 2 0 0 1 0 1 3 0 0 1 1 0 4 0 1 0 0 1 5 0 1 0 1 0 6 0 1 1 0 0 7 0 1 1 1 1 8 1 0 0 0 1 9 1 0 0 1 0 10 1 0 1 0 0 11 1 0 1 1 1 12 1 1 0 0 0 13 1 1 0 1 1 14 1 1 1 0 1 15 1 1 1 1 0
Q1. Design a simple circuit from the function Y by reducing it using appropriate k-map , draw corresponding Logic Diagram for the simplified Expression Truth Table D C B A Y 0 0 0 0 0 0 1 0 0 0 1 1 2 0 0 1 0 1 3 0 0 1 1 0 4 0 1 0 0 1 5 0 1 0 1 0 6 0 1 1 0 0 7 0 1 1 1 1 8 1 0 0 0 1 9 1 0 0 1 0 10 1 0 1 0 0 11 1 0 1 1 1 12 1 1 0 0 0 13 1 1 0 1 1 14 1 1 1 0 1 15 1 1 1 1 0
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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Q1. Design a simple circuit from the function Y by reducing it using appropriate k-map , draw corresponding Logic Diagram for the simplified Expression
Truth Table |
|||||
D |
C |
B |
A |
Y |
|
0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
2 |
0 |
0 |
1 |
0 |
1 |
3 |
0 |
0 |
1 |
1 |
0 |
4 |
0 |
1 |
0 |
0 |
1 |
5 |
0 |
1 |
0 |
1 |
0 |
6 |
0 |
1 |
1 |
0 |
0 |
7 |
0 |
1 |
1 |
1 |
1 |
8 |
1 |
0 |
0 |
0 |
1 |
9 |
1 |
0 |
0 |
1 |
0 |
10 |
1 |
0 |
1 |
0 |
0 |
11 |
1 |
0 |
1 |
1 |
1 |
12 |
1 |
1 |
0 |
0 |
0 |
13 |
1 |
1 |
0 |
1 |
1 |
14 |
1 |
1 |
1 |
0 |
1 |
15 |
1 |
1 |
1 |
1 |
0 |
#Implement the simplified logical expression of Question 1 using universal gates (NAND) How many NAND gates are required as well specify how many ICs are needed
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