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Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN: 9780133594140
Author: James Kurose, Keith Ross
Publisher: PEARSON
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how to solve both parts with working

Transcribed Image Text:Q1
a) Design a 16-bit carry ripple incrementer with the half adder shown below. Assume the 2-input
AND and XOR gates have 2ns and 5ns delay respectively. Find and select the correct maximum
propagation delay for a 16-bit carry ripple incrementer to generate correct and stable outputs
(i.e for all sum and carry out bits).
Answer = 35ns
a b
B
CO
S
Half adder
b) Assuming a 2-input AND gate has 2ns delay, a 2-input XOR gate has 1ns delay. What is the
propagation delay for an 8-bit incrementer to generate the correct summation and carry_out
outputs.
Answer = 32ns
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