k-(i-1)- k-(i-1) - 2 1 2 k-i+1 k-i+

Consider a circuit designed as follows: • one 1-bit register (like those discussed in class), with an attached clock • one not gate • wire A connects the register's ouput and the not's input • wire B connects the not's output and the register's input If we put a 1 onto wire B: A. wire A gets a 0 immediately B. wire A gets a 0 after the short delay it takes the gates in the register to finish work C. wire A gets a 0 after the next clock tick D. wire A gets a 1 immediately E. wire A gets a 1 after the short delay it takes the gates in the register to finish work O F. wire A gets a 1 after the next clock tick

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Comp Architecture Problem 7 and 8