In this exercise, we will examine space/time optimizations for page tables. The following list provides parameters of a virtual memory system. Physical DRAM Installed Page Size 4 KiB PTE Size (byte) 4 16 GiB (a) For a single-level page table, how many page table entries (PTES) are needed? How much physical memory is needed for storing the page table? Virtual Address (bits) 43 (b) Using a multilevel page table can reduce the physical memory consumption of page tables, by only keeping active PTEs in physical memory. How many levels of page tables will be needed if the segment tables (the upper-level page tables) are allowed to be of unlimited size? And how many memory references are needed for address translation if missing in TLB? (c) An inverted page table can be used to further optimize space and time. How many PTES are needed to store the page table? Assuming a hash table implementation, what are the common case and worst case numbers of memory references needed for servicing a TLB miss?

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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In this exercise, we will examine space/time optimizations for page tables. The following list provides parameters of a virtual memory
system.
Physical DRAM
Installed
Virtual Address (bits)
Page Size
4 KiB
PTE Size (byte)
4
43
16 GiB
(a) For a single-level page table, how many page table entries (PTES) are needed? How much physical memory is needed for storing
the page table?
(b) Using a multilevel page table can reduce the physical memory consumption of page tables, by only keeping active PTEs in
physical memory. How many levels of page tables will be needed if the segment tables (the upper-level page tables) are allowed
to be of unlimited size? And how many memory references are needed for address translation if missing in TLB?
(c) An inverted page table can be used to further optimize space and time. How many PTES are needed to store the page table?
Assuming a hash table implementation, what are the common case and worst case numbers of memory references needed for
servicing a TLB miss?
Transcribed Image Text:In this exercise, we will examine space/time optimizations for page tables. The following list provides parameters of a virtual memory system. Physical DRAM Installed Virtual Address (bits) Page Size 4 KiB PTE Size (byte) 4 43 16 GiB (a) For a single-level page table, how many page table entries (PTES) are needed? How much physical memory is needed for storing the page table? (b) Using a multilevel page table can reduce the physical memory consumption of page tables, by only keeping active PTEs in physical memory. How many levels of page tables will be needed if the segment tables (the upper-level page tables) are allowed to be of unlimited size? And how many memory references are needed for address translation if missing in TLB? (c) An inverted page table can be used to further optimize space and time. How many PTES are needed to store the page table? Assuming a hash table implementation, what are the common case and worst case numbers of memory references needed for servicing a TLB miss?
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