In this exercise, we will examine how replacement policies impact miss rate. Assume a 2-way set associative cache with 4 blocks. To solve the problems in this exercise, you may find it helpful to draw a table like the one below, as demonstrated for the address sequence “0, 1, 2, 3, 4.” Consider the following address sequence: 0, 2, 4, 8, 10, 12, 14, 8, 0. 5.1 – Assuming an LRU replacement policy, how many hits does this address sequence exhibit? Please show the status of the cache after each address is accessed. 5.2 – Assuming an MRU (most recently used) replacement policy, how many hits does this address sequence exhibit? Please show the status of the cache after each address is accessed.

In this exercise, we will examine how replacement policies impact miss rate. Assume a 2-way set associative cache with 4 blocks. To solve the problems in this exercise, you may find it helpful to draw a table like the one below, as demonstrated for the address sequence “0, 1, 2, 3, 4.” Consider the following address sequence: 0, 2, 4, 8, 10, 12, 14, 8, 0. 5.1 – Assuming an LRU replacement policy, how many hits does this address sequence exhibit? Please show the status of the cache after each address is accessed. 5.2 – Assuming an MRU (most recently used) replacement policy, how many hits does this address sequence exhibit? Please show the status of the cache after each address is accessed.

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter11: Operating Systems

Section: Chapter Questions

Problem 3VE

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Similar questions

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