In the 5-state state diagram in the figure, use the symbols X for input and Y and Z for outputs, respectively. a) Indicate whether it is Mealy or Moore type, with justification b) Draw the ASM (Algorithmic State Machine Chart) for the State Diagram. c) Draw the state table.

Reduce the Boolean function specified in the truth table below to its minimum SOP form using K-map, where A, B, C are the inputs while X are the outputs. Based on the reduced Boolean function, design the logic circuit using any logic gates. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 1 с 0 1 0 1 0 1 0 1 X 1 1 0 1 1 1 0 1

9.32 Consider the finite-state machine logic implementation in Figure P9.32. (a) Determine the next-state and output logic expressions. (b) Determine the number of possible states. (c) Construct a state assigned table. (d) Construct a state table. (e) Construct a state diagram. (f) Determine the function of the finite-state machine. X Y2 Clk Figure P9.32 Y1 D 0 Yı A D Clk 10 Clk Q Y2

Y=f(A,B,C)=(0,4,5)+don't care(2)

Needs Complete solution with 100 % accuracy.

5) Draw the circuit diagram using diode and write the truth table of a logic gates whose output will be the logical OR operation of two inputs.