Design an exclusive nor (XNOR) gate using only 74HC02 NOR gates. (Pin outs shown below). Complete your design by first drawing the truth table for the XNOR gate, simplify, and then draw the logic including pin numbers, Vee and ground for the dual inline package. This is to be a build ready design. Be sure to account for unused gates.

2-to-1 multiplexers with an active high output and active high enable are to be used in the following implementations: (a) Show how to implement a 4-to-1 multiplexer with an active high output and no enable using two of the 2-to-1 MUXes and a minimum number of additional gates. (b) Repeat part (a) for a 4-to-1 multiplexer with an active low output. (c) Repeat part (b) assuming the output of the 2-to-1 MUX is 1 (rather than 0) when the enable is 0.

Draw a switch-level model for a CMOS NOR gate in the style of Figure 1-14, showing the same three input conditions as in that figure.

Q5. (a) Convert the following logic gate circuit into a Boolean expression, writing Boolean sub-expressions next to each gate output in the diagram: (b) Realise Ex-NOR gate using universal gate?