Choose the correct answer: Opcode, funct3 and funct7/6 in instruction format are used to identify the: ● (a) function. (b) instruction. (c) branch. (d) memory address. The register that hold the address of the current instruction being executed is called: (a) saved register. (b) global pointer. (e) stack pointer. (d) program counter. Placing the executable file into the memory for execution by the processor is the role of: (a) assembler. (b) linker. (e) loader. (d) compiler. ● ● The part which responsible for transmitting the data to/from the processor is: (a) control unit. (b) Datapath. (c) data bus. (d) memory. ● Parallel hardware cannot be used for faster division because: (a) subtraction is conditional on sign of remainder. (b) multiplication is conditional on sign of remainder. (c) subtraction is conditional on sign of divisor. (d) multiplication is conditional on sign of divisor. we cannot slower the clock cycle to fit the floating-point adder algorithm into one clock cycle because: (a) it would penalize all instructions. (b) the operations of floating point are much longer than integer. (c) pipelining the floating-point adder algorithm steps is better. ●
Choose the correct answer: Opcode, funct3 and funct7/6 in instruction format are used to identify the: ● (a) function. (b) instruction. (c) branch. (d) memory address. The register that hold the address of the current instruction being executed is called: (a) saved register. (b) global pointer. (e) stack pointer. (d) program counter. Placing the executable file into the memory for execution by the processor is the role of: (a) assembler. (b) linker. (e) loader. (d) compiler. ● ● The part which responsible for transmitting the data to/from the processor is: (a) control unit. (b) Datapath. (c) data bus. (d) memory. ● Parallel hardware cannot be used for faster division because: (a) subtraction is conditional on sign of remainder. (b) multiplication is conditional on sign of remainder. (c) subtraction is conditional on sign of divisor. (d) multiplication is conditional on sign of divisor. we cannot slower the clock cycle to fit the floating-point adder algorithm into one clock cycle because: (a) it would penalize all instructions. (b) the operations of floating point are much longer than integer. (c) pipelining the floating-point adder algorithm steps is better. ●
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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