A multiplexer a.Takes a single data input and routes it to one of several outputs b.Selects from many data sources c.converts a binary code input to a single output d.converts a single input to a binary code
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- A multiplexer a. Selects where data should be sent b. Selects one out of several data input lines c. Has a single input and converts it to a binary output d. Has a binary input and converts it to a single outputehcu.org/pluginfile 100% 10 / 11 locations, count how many times is 0 and how many times 1 is. Questions:- 1- Write a program in assembly language to perform the following logic ci BL CL DL [5100]- 2- How we can perform the NEG and NOT instructions by using different instructions. 3- Write the following program by using different instruction or instructions for each instruction on the program. MOV AL , 00 MOV BX , FFFF XOR CL , FF NEG BYTE PTR [DI] AND CX , LGQ3) A - Convert the Excess-3 to binary number : ( 110001011100.10001010)ex-3 B- convert each Gray code to binary: 1-( 011010001001)G 2-(59)D
- Q4(a) Adder is divided into three types which are half adder, full adder, and parallel adder. Illustrate the implementation of full adder using half adder with necessary logic gates. (i) (ii) Figure Q4(a)(ii) shows the input timing diagram for a full adder. Illustrate the timing diagrams for output S and Cout- Cin Cout Figure Q4(a)(ii)The upper 16 -bit binary count value are displayed on the four seven -segemnt displays as four hexadecimal digits. Hexadecimal values aren't good for human perception. How would you suggest the counter design be modified so that only decimal count values are displayed.Q4(a) Adder is divided into three types which are half adder, full adder, and parallel adder. Illustrate the implementation of full adder using half adder with necessary logic gates. (i) (ii) Figure Q4(a)(ii) shows the input timing diagram for a full adder. Illustrate the timing diagrams for output S and Cout- B Cin Cout Figure Q4(a)(ii) (iii) Given A = 111001 and B = 100010. Construct a 6-bit parallel adder to solve for A + B.
- please show work included 4. If a 6-bit binary number is used to represent an analog value in the range from -63 to 126, what is the accuracy of the system? In other words, if the binary number is incremented by one, how much change does it represent in the analog value?1.Assume that one input of a two-input AND gate is connected to a square wave. If the other input is connected to a logic high, what will be present on the output? A. A constant logic high B. A square wave C. A square wave that mirrors the input square wave D. A constant logic lowBy using the design procedure for digital computers, design the following:i. Encoderii. Decoderiii. 4-bit comparator
- Draw logic diagram for half adder and full adder circuit using Logisim SoftwareWhich statement describe a digital signal? a. is a smoothly and continuously varying voltage or current. b. will take on finite set of voltage levels. c. take on all possible values of amplitude. d. can have an infinite number of values in a rangeA 9-bit asynchronous counter has a 128-kHz clock signal applied. (1) What is the MOD number of this counter? MOD number = (ii) What will be the frequency at the MSB output? fmsb = (iii) Assume that the counter starts at zero. What will be the count after 635 input pulses? After 635 input pulse, Count =