A depletion MOFSET is operating with? 1. with a zero, positive, or negative gate-to-source voltage 2. with only a positive gate-to-source voltage 3. with only a negative gate-to-source voltage 4. with positive or negative gate-to-source voltage

Follow the instructions below using the parameters below. 0.6um technology. Any size transistor (W or L) must be divisible by 0.3um to be produced by any company. Always set the sizes of W and L assuming the smallest L possible for each transistor according to the technology. Include units VDD = 3V: VT0P = 0.7V; VTON = 0.5V; unCox = 99uA / V ^ 2 upCox = 33uA / V ^ 2; gamma = 0.1 sqrt (V); 2ΦF = 0.6V Design a bit of a static RAM memory when the capacitance of Q, CQ = 5fF and the capacitance of the line bit is 1pF. a.  Draw your schematic identify each node and list the transistors. b. Draw the sense amplifier circuit and the precharge-equalizer, if the user wants to precharge the line to VDD. c. The access transistors in a RAM memory bit have a size (W / L) a = 6um / 0.6um Determines the minimum size of the NMOS transistors in the inverters. Justify the size you are choosing for each transistor

Figure 2 illustrates the example use of FET using common-gate configuration. For the given circuit configuration: (i) Calculate the Q-point of the network. (ii) Determine the voltage drain-source, Vos and voltage source, Vs terminals. (ii) Modify this common-gate configuration into self-bias configuration by using the same FET, resistors and DC supply. State any additional or removal components in the circuit and draw the new circuit. Then, determine value of VGs, VDs and Vs. 12V 3.6k2 5.6 µF HE Ipss =10mA Vp = -4 V Rsie 5.6 μF 4.7 kQ I k2 1.1ko Figure 2