5. Design a 4-bit binary synchronous counter using JK flip-flops which counts up only in even numbers (0, 2,4,6, ...). a) Provide the state table. b) Write the next-state equations. c) Draw the logic diagram

4. Describe how a JK Flip Flop circuit, with different configurations such as clock speed, output cycle, frequency, can relate to binary numbers.

Using manual methods, obtain the logic diagram of a three-bit counter that counts in the sequence 0, 2, 4, 6, 0, . . . .

25-4: Construct an RS flip-flop using a D flip-flop and a few gates.

solve this problem but use T flip-flops

Precharge and Evaluate are two phases in: a. Dynamic CMOS logic b. Static NMOS logic c. NMOS logic d. pseudo NMOS logic

The logic diagram on the right shows a "T-D flip- flop" that can function as a T-type flip-flop or a D-type flip-flop. i) Derive the next state equation for the T-D flip flop circuits. ii) Implement the circuit using D-type flip-flop as your memory element. iii) Implement your circuit using R-S flip-flop. Clock C(CONTROL) M (MODE) T_D LATCH K 2 2 b QBAR

(a) Write the BCD code for 9   (b) Write the BCD code for 6  (c) What is the BCD code for 15?  (d) Explain how can the answer in (c) can be obtained if you add the answers in (a) and (b).